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https://github.com/zephyrproject-rtos/zephyr
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fa99ad66d0
There were three separate "announce ticks" entry points exposed for use by drivers. Unify them to just a single z_clock_announce() function, making the "final" tick announcement the business of the driver only, not the kernel. Note the oddness with "_sys_idle_elapsed_ticks": this was a global variable exposed by the kernel. But it was never actually used by the kernel. It was updated and inspected only within the timer drivers, and only so that it could be passed back to the kernel as the default (actually hidden) argument to the announce function. Break this false dependency by putting this variable into each timer driver individually. Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <arch/cpu.h>
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#include <device.h>
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#include <system_timer.h>
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#include <altera_common.h>
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#include "altera_avalon_timer_regs.h"
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#include "altera_avalon_timer.h"
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static u32_t accumulated_cycle_count;
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static s32_t _sys_idle_elapsed_ticks = 1;
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static void timer_irq_handler(void *unused)
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{
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ARG_UNUSED(unused);
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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extern void read_timer_start_of_tick_handler(void);
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read_timer_start_of_tick_handler();
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#endif
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accumulated_cycle_count += sys_clock_hw_cycles_per_tick();
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/* Clear the interrupt */
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alt_handle_irq((void *)TIMER_0_BASE, TIMER_0_IRQ);
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z_clock_announce(_sys_idle_elapsed_ticks);
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#ifdef CONFIG_EXECUTION_BENCHMARKING
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extern void read_timer_end_of_tick_handler(void);
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read_timer_end_of_tick_handler();
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#endif
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}
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int _sys_clock_driver_init(struct device *device)
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{
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ARG_UNUSED(device);
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IOWR_ALTERA_AVALON_TIMER_PERIODL(TIMER_0_BASE,
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sys_clock_hw_cycles_per_tick() & 0xFFFF);
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IOWR_ALTERA_AVALON_TIMER_PERIODH(TIMER_0_BASE,
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(sys_clock_hw_cycles_per_tick() >> 16) & 0xFFFF);
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IRQ_CONNECT(TIMER_0_IRQ, 0, timer_irq_handler, NULL, 0);
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irq_enable(TIMER_0_IRQ);
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alt_avalon_timer_sc_init((void *)TIMER_0_BASE, 0,
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TIMER_0_IRQ, sys_clock_hw_cycles_per_tick());
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return 0;
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}
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u32_t _timer_cycle_get_32(void)
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{
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/* Per the Altera Embedded IP Peripherals guide, you cannot
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* use a timer instance for both the system clock and timestamps
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* at the same time.
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*
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* Having this function return accumulated_cycle_count + get_snapshot()
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* does not work reliably. It's possible for the current countdown
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* to reset to the next interval before the timer interrupt is
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* delivered (and accumulated cycle count gets updated). The result
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* is an unlucky call to this function will appear to jump backward
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* in time.
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*
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* To properly obtain timestamps, the CPU must be configured with
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* a second timer peripheral instance that is configured to
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* count down from some large initial 64-bit value. This
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* is currently unimplemented.
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*/
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return accumulated_cycle_count;
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}
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