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https://github.com/zephyrproject-rtos/zephyr
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738f76736e
Add depends on SOC_SERIES_SAM4E to enable spi driver for sam4e soc. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
221 lines
4.2 KiB
Plaintext
221 lines
4.2 KiB
Plaintext
# Atmel SAM SPI
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# Copyright (c) 2019 Gerson Fernando Budke
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# Copyright (c) 2018 qianfan Zhao
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# SPDX-License-Identifier: Apache-2.0
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menuconfig SPI_SAM
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bool "Atmel SAM series SPI driver"
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default y
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depends on SOC_FAMILY_SAM
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help
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Enable support for the SAM SPI driver.
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config SPI_SAM_PORT_0
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bool "Enable SPI0"
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depends on SPI_SAM
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select SPI_0
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help
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Enable SPI0 at boot
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if SPI_SAM_PORT_0
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choice SPI_SAM_PORT_0_PIN_CS0
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bool "CS0 pin"
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optional
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E || \
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SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_0_PIN_CS0_PA11
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bool "PA11"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS0_PB2
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bool "PB2"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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choice SPI_SAM_PORT_0_PIN_CS1
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bool "CS1 pin"
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optional
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E || \
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SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_0_PIN_CS1_PA9
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bool "PA9"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS1_PA31
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bool "PA31"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E || \
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SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_0_PIN_CS1_PB14
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bool "PB14"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS1_PC4
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bool "PC4"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS1_PD25
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bool "PD25"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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choice SPI_SAM_PORT_0_PIN_CS2
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bool "CS2 pin"
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optional
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E || \
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SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_0_PIN_CS2_PA10
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bool "PA10"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS2_PA30
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bool "PA30"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS2_PB2
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bool "PB2"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS2_PD12
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bool "PD12"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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choice SPI_SAM_PORT_0_PIN_CS3
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bool "CS3 pin"
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optional
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E || \
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SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_0_PIN_CS3_PA3
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bool "PA3"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS3_PA5
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bool "PA5"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS3_PA22
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bool "PA22"
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depends on SOC_SERIES_SAM4S || \
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SOC_SERIES_SAM4E
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config SPI_SAM_PORT_0_PIN_CS3_PD27
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bool "PD27"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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endif # SPI_SAM_PORT_0
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config SPI_SAM_PORT_1
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bool "Enable SPI1"
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depends on SPI_SAM && \
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(SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71)
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select SPI_1
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help
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Enable SPI1 at boot
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if SPI_SAM_PORT_1
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choice SPI_SAM_PORT_1_PIN_CS0
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bool "CS0 pin"
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optional
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS0_PC25
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bool "PC25"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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choice SPI_SAM_PORT_1_PIN_CS1
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prompt "CS1 pin"
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optional
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS1_PC28
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bool "PC28"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS1_PD0
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bool "PD0"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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choice SPI_SAM_PORT_1_PIN_CS2
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prompt "CS2 pin"
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optional
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS2_PC29
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bool "PC29"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS2_PD1
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bool "PD1"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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choice SPI_SAM_PORT_1_PIN_CS3
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prompt "CS3 pin"
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optional
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS3_PC30
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bool "PC30"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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config SPI_SAM_PORT_1_PIN_CS3_PD2
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bool "PD2"
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depends on SOC_SERIES_SAME70 || \
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SOC_SERIES_SAMV71
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endchoice
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endif # SPI_SAM_PORT_1
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