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https://github.com/zephyrproject-rtos/zephyr
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8df10d4584
There are two major issues with the kconfig: () Some of the config options have incorrect dependencies inside help under menuconfig. For example, CONFIG_GPIO depends on BOARD_GALILEO. () Since the SoC and board specific kconfig files are parsed first, the help screen would say, for example, CONFIG_SPI is defined at arch/arm/soc/fsl_frdm_k64f/Kconfig. This is incorrect because the actual config is defined in drivers/spi/Kconfig. These cause great confusion to users of menuconfig/xconfig. To fix these, the SoC and board defaults are now to be parsed last. Note that the position swapping of defaults in this patch is due to the fact the the default parsed last will be used. And, spi_test is broken due to the fact that it requires CONFIG_SPI_INTEL_PORT_1, but never enables it anywhere. This is bypassed for now. Origin: refactored and edited from existing files Change-Id: I2a4b1ae5be4d27e68c960aa47d91ef350f2d500f Signed-off-by: Daniel Leung <daniel.leung@intel.com>
293 lines
6.6 KiB
Plaintext
293 lines
6.6 KiB
Plaintext
# Kconfig.dw - DesignWare GPIO configuration options
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#
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#
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# Copyright (c) 2016 Intel Corporation
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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#
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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#
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menuconfig GPIO_DW
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prompt "Designware GPIO"
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default n
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depends on GPIO
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bool
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help
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Enable driver for Designware GPIO
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if GPIO_DW
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config GPIO_DW_IO_ACCESS
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prompt "I/O register access"
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default n
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default y if ARC
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depends on GPIO_DW
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bool
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help
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Driver access configuration register by
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I/O or auxiliary registers.
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config GPIO_DW_BOTHEDGES_SUPPORT
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bool
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prompt "Interrupt on Both Edges"
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default y
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depends on GPIO_DW && !ARC
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help
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This option is enabled by platforms that
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supports the interrupt-both-edges feature.
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This feature allows the GPIO hardware to
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trigger and interrupt on both, falling and
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rising, edges of an input.
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config GPIO_DW_SHARED_IRQ
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bool
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default n
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depends on GPIO_DW
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config GPIO_DW_VENDOR_ID
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hex "PCI Vendor ID"
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depends on GPIO_DW && PCI
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default 0x8086
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config GPIO_DW_DEVICE_ID
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hex "PCI Device ID"
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depends on GPIO_DW && PCI
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default 0x934
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config GPIO_DW_CLASS
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hex "PCI class"
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depends on GPIO_DW && PCI
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default 0x0C
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config GPIO_DW_INIT_PRIORITY
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int
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default 60
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depends on GPIO_DW
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prompt "Init priority"
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help
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Device driver initialization priority.
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config GPIO_DW_CLOCK_GATE
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bool "Enable glock gating"
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depends on GPIO_DW
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select CLOCK_CONTROL
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default n
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config GPIO_DW_CLOCK_GATE_DRV_NAME
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string
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depends on GPIO_DW_CLOCK_GATE
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default ""
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config GPIO_DW_0
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bool "Designware GPIO block 0"
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depends on GPIO_DW
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default n
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help
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Include Designware GPIO driver
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config GPIO_DW_0_NAME
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string "Driver name"
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depends on GPIO_DW_0
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default "GPIO_0"
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config GPIO_DW_0_BASE_ADDR
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hex "Controller base address"
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depends on GPIO_DW_0
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config GPIO_DW_0_BUS
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int "Port 0 PCI Bus"
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depends on GPIO_DW_0 && PCI
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config GPIO_DW_0_DEV
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int "Port 0 PCI Dev"
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depends on GPIO_DW_0 && PCI
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config GPIO_DW_0_FUNCTION
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int "PCI function number"
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depends on GPIO_DW_0 && PCI
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config GPIO_DW_0_BAR
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int "PCI BAR slot"
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depends on GPIO_DW_0 && PCI
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config GPIO_DW_0_BITS
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int "Number of pins controlled"
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depends on GPIO_DW_0
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help
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Number of pins controlled by controller
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config GPIO_DW_0_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on GPIO_DW_CLOCK_GATE && GPIO_DW_0
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choice
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prompt "Port 0 Interrupts via"
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default GPIO_DW_0_IRQ_DIRECT
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depends on GPIO_DW_0
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config GPIO_DW_0_IRQ_DIRECT
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bool "Direct Hardware Interrupt"
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help
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When interrupts fire, the driver's ISR function is being called directly.
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config GPIO_DW_0_IRQ_SHARED
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bool "Shared IRQ"
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depends on SHARED_IRQ
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select GPIO_DW_SHARED_IRQ
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help
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When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
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driver dispatches the interrupt to other drivers.
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endchoice
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choice
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prompt "DW GPIO port 0 trigger condition"
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default GPIO_DW_0_RISING_EDGE
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depends on GPIO_DW_0 && GPIO_DW_0_IRQ_DIRECT
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config GPIO_DW_0_FALLING_EDGE
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bool "Falling edge"
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help
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DW GPIO port 0 uses falling edge interrupt
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config GPIO_DW_0_RISING_EDGE
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bool "Rising edge"
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help
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DW GPIO port 0 uses rising edge interrupt
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config GPIO_DW_0_LEVEL_HIGH
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bool "Level high"
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help
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DW GPIO port 0 uses level high interrupt
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config GPIO_DW_0_LEVEL_LOW
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bool "Level low"
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help
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DW GPIO port 0 uses level low interrupt
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endchoice
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config GPIO_DW_0_IRQ_SHARED_NAME
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string "Device name for Shared IRQ"
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depends on GPIO_DW_0 && GPIO_DW_0_IRQ_SHARED
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help
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Specify the device name for the shared IRQ driver. It is used to register
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this driver with the shared IRQ driver, so interrupts can be dispatched
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correctly.
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config GPIO_DW_0_IRQ
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int "Controller interrupt number"
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depends on GPIO_DW_0 && GPIO_DW_0_IRQ_DIRECT
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help
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IRQ number for the controller
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config GPIO_DW_0_PRI
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int "Controller interrupt priority"
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depends on GPIO_DW_0 && GPIO_DW_0_IRQ_DIRECT
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help
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IRQ priority
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config GPIO_DW_1
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bool "Designware GPIO block 1"
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depends on GPIO_DW
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default n
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help
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Include Designware GPIO driver
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config GPIO_DW_1_NAME
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string "Driver name"
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depends on GPIO_DW_1
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default "GPIO_1"
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config GPIO_DW_1_BASE_ADDR
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hex "Controller base address"
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depends on GPIO_DW_1
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config GPIO_DW_1_BITS
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int "Number of pins controlled"
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depends on GPIO_DW_1
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help
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Number of pins controlled by controller
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config GPIO_DW_1_CLOCK_GATE_SUBSYS
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int "Clock controller's subsystem"
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depends on GPIO_DW_CLOCK_GATE && GPIO_DW_1
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choice
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prompt "Port 1 Interrupts via"
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default GPIO_DW_1_IRQ_DIRECT
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depends on GPIO_DW_1
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config GPIO_DW_1_IRQ_DIRECT
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bool "Direct Hardware Interrupt"
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help
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When interrupts fire, the driver's ISR function is being called directly.
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config GPIO_DW_1_IRQ_SHARED
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bool "Shared IRQ"
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depends on SHARED_IRQ
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select GPIO_DW_SHARED_IRQ
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help
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When interrupts fire, the shared IRQ driver is notified. Then the shared IRQ
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driver dispatches the interrupt to other drivers.
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endchoice
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config GPIO_DW_1_IRQ_SHARED_NAME
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string "Device name for Shared IRQ"
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depends on GPIO_DW_1_IRQ_SHARED
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help
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Specify the device name for the shared IRQ driver. It is used to register
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this driver with the shared IRQ driver, so interrupts can be dispatched
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correctly.
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config GPIO_DW_1_IRQ
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int "Controller interrupt number"
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depends on GPIO_DW_1 && GPIO_DW_1_IRQ_DIRECT
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help
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IRQ number for the controller
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config GPIO_DW_1_PRI
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int "Controller interrupt priority"
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depends on GPIO_DW_1 && GPIO_DW_1_IRQ_DIRECT
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help
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IRQ priority
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choice
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prompt "DW GPIO port 1 trigger condition"
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default GPIO_DW_1_RISING_EDGE
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depends on GPIO_DW_1 && GPIO_DW_1_IRQ_DIRECT
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config GPIO_DW_1_FALLING_EDGE
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bool "Falling edge"
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help
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DW GPIO port 1 uses falling edge interrupt
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config GPIO_DW_1_RISING_EDGE
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bool "Rising edge"
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help
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DW GPIO port 1 uses rising edge interrupt
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config GPIO_DW_1_LEVEL_HIGH
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bool "Level high"
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help
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DW GPIO port 1 uses level high interrupt
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config GPIO_DW_1_LEVEL_LOW
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bool "Level low"
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help
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DW GPIO port 1 uses level low interrupt
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endchoice
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endif # GPIO_DW
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