mirror of
https://github.com/zephyrproject-rtos/zephyr
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5c62097bda
This commit adds functions to select the low flash device and set the size of the low flash device. Signed-off-by: Tom Chang <CHChang19@nuvoton.com>
77 lines
2.3 KiB
Plaintext
77 lines
2.3 KiB
Plaintext
# NPCX Flash driver configuration options
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# Copyright (c) 2023 Nuvoton Technology Corporation.
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# SPDX-License-Identifier: Apache-2.0
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config FLASH_NPCX_FIU_QSPI
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bool "Nuvoton NPCX QSPI Bus Flash driver"
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default y
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depends on DT_HAS_NUVOTON_NPCX_FIU_QSPI_ENABLED
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select PINCTRL
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help
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This option enables the QSPI Bus Flash driver for NPCX family of
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processors.
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config FLASH_NPCX_FIU_NOR
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bool "Nuvoton NPCX embedded controller (EC) QSPI NOR Flash driver"
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default y
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depends on DT_HAS_NUVOTON_NPCX_FIU_NOR_ENABLED
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depends on FLASH_NPCX_FIU_QSPI
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select FLASH_HAS_DRIVER_ENABLED
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select FLASH_HAS_PAGE_LAYOUT
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select FLASH_HAS_EXPLICIT_ERASE
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select FLASH_JESD216
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select FLASH_HAS_EX_OP
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help
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This option enables the QSPI NOR Flash driver for NPCX family of
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processors.
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if FLASH_NPCX_FIU_QSPI
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config FLASH_NPCX_FIU_NOR_INIT
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bool "QSPI NOR flash feature during driver initialization"
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default y
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depends on FLASH_NPCX_FIU_NOR
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help
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This option enables the QSPI NOR Flash features such as Quad-Enable,
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4-byte address support and so on during driver initialization. Disable
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it if QSPI NOR devices are not ready during driver initialization.
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config FLASH_NPCX_FIU_DRA_V1
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bool "Direct Read Access version 1 support"
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default y if SOC_SERIES_NPCX9
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help
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This option enables DRA V1 support.
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config FLASH_NPCX_FIU_DRA_V2
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bool "Direct Read Access version 2 support"
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default y if SOC_SERIES_NPCX4
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help
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This option enables DRA V1 support.
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config FLASH_NPCX_FIU_SUPP_DRA_4B_ADDR
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bool "4 byte address support in Direct Read Access mode"
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default y if FLASH_NPCX_FIU_DRA_V1 || \
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FLASH_NPCX_FIU_DRA_V2
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help
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Selected if NPCX series supports 4 byte address mode in Direct Read
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Access mode.
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config FLASH_NPCX_FIU_SUPP_DRA_2_DEV
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bool "4 byte address support in Direct Read Access mode"
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default y if FLASH_NPCX_FIU_DRA_V1 || \
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FLASH_NPCX_FIU_DRA_V2
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help
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Selected if NPCX series supports two external SPI devices in Direct
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Read Access (DRA) on QSPI bus.
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DT_NPCX_FIU_LOW_DEV_SWAP := $(dt_nodelabel_bool_prop,qspi_fiu1,flash-dev-inv)
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config FLASH_NPCX_FIU_SUPP_LOW_DEV_SWAP
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bool "Inverse the access of the two external flashes"
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default y if SOC_SERIES_NPCX4 && FLASH_NPCX_FIU_SUPP_DRA_2_DEV && \
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"$(DT_NPCX_FIU_LOW_DEV_SWAP)"
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help
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Select if it needs to swap the access of the two external flashes.
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endif #FLASH_NPCX_FIU_QSPI
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