Commit Graph

2081 Commits

Author SHA1 Message Date
Abhishek Shah
0ffea47bca dts: bindings: pl330: add dma-cells property
Add dma-cells property in pl330 dma binding document.
Currently only one integer cell with "channel" name is
added in order for the client to specify channel id
to be used for data transfer out of available channels.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-12-01 14:56:59 -05:00
Alexander Kozhinov
2b2b5398e7 dts: arm: st: h7: stm32h745
add description to SRAM regions

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-30 15:48:49 +01:00
Erwan Gouriou
82c614ac9d boards: Fix 2 liners copyright
Convert 2 lines copyright before this new format starts creating
the new in vogue style.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-26 13:51:04 +01:00
Alexander Kozhinov
ed4cae5d1d dts: arm: st: h723
add stm32h723 dts files

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-25 15:07:59 +02:00
Gerard Marull-Paretas
e671d363b8 drivers: memc: stm32: initial support for stm32 FMC
This commit adds a new driver category for memory controller
peripherals. There is no API involved for now, as it has not been found
necessary for first implementation.

STM32 Flexible Memory Controller (FMC) is the only controller supported
for now. This peripheral allows to access multiple types of external
memories, e.g. SDRAM, NAND, NOR Flash...

The initial implementation adds support for the SDRAM controller only.
The HAL API is used, so the implementation should be portable to other
STM32 series. It has only been tested on H7 series, so for now it can
only be enabled when working on H7.

Linker facilities have also been added in order to allow applications to
easily define a variable in SDRAM.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-24 16:33:17 +01:00
Francois Ramu
da614fccd6 dts: dma : stm32 soc with dmamux has a special offset
The offset value in the dma config is required when the
soc has dmamux like the stm32wb series

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-11-19 17:04:25 -05:00
Jakub Pegza
19a93a3c68 boards: arm: nordic: Update DTS for nrf21540
Update nrf21540 DTS to support FEM configuration and update other pins
according to te board datasheet

Signed-off-by: Jakub Pegza <Jakub.Pegza@nordicsemi.no>
2020-11-19 17:02:00 -05:00
Katsuhiro Suzuki
2b42efeb8e dts/bindings: Add binding for riscv,clint0
Currently there is no binding for RISC-V Core-Local Interruptor.
This patch add a simple binding.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2020-11-19 17:00:46 -05:00
Katsuhiro Suzuki
0a6918d064 dts: riscv32-fe310: add missing clint properties
RISC-V clint is an interrupt controller but it has no required
properties (#interrupt-cells and interrupt-controller).
This patch just adds missing properties.

Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
2020-11-19 12:45:14 -05:00
Gerson Fernando Budke
2d3ef0c902 dts: i2c: Add atmel sam TWIM controllers
Add Atmel SAM I2C Two-wire Master Interface (TWIM).  The SAM
i2c controller have specifics regs depending of operation mode
Master/Slave and the bindings are for Master only.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-11-19 10:52:49 -06:00
Peter Bigot
73d416a572 dts: binding-template: document conditions for use of default values
The YAML binding allows for a default which is used to substitute a
value if one is not explicit in the devicetree source.  This feature
is mis-used when defaults are provided that are likely to be
incorrect.

Document concerns with the use of default and provide guidance for
when it can be used, what to do when it shouldn't, and noting the need
to explain the source of the default in the binding documentation.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-11-19 12:38:33 +01:00
Harry Jiang
d0058d92db dts: arm: st: h7: Add SPI nodes to STM32H7xx SoC
Add the SPI nodes to STM32H7xx Series Soc

Signed-off-by: Harry Jiang <explora26@gmail.com>
2020-11-19 12:35:12 +01:00
Yestin Sun
b31b1d133e boards: stm32l562e_dk: add support for I2C
Add i2c1 interface for stm32l552xx and stm32l562xx microcontrollers
and enable i2c1 that connects to lsm6dso sensor module on the
stm32l562e_dk board.

Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
2020-11-18 14:33:52 -05:00
Mohamed ElShahawi
02376b0d8c dts: stm32: Add SDMMC2 support for STM32F72x/F76x
- Define sdmmc2 for STM32F72x/F76x  series.

Signed-off-by: Mohamed ElShahawi <ExtremeGTX@hotmail.com>
2020-11-18 14:33:16 -05:00
Henrik Brix Andersen
de53643e56 dts: bindings: add bindings for the Xilinx AXI Timer
Add devicetree bindings for the Xilinx AXI Timer IP. This timer can
either be used as a counter or as a PWM controller.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-17 19:30:20 -05:00
Maureen Helm
84cc60e53c drivers: sensor: Convert fxos8700 vector mag Kconfigs to dts properties
Converts fxos8700 magnetic vector magnitude options from Kconfigs to
optional device tree properties.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 16:51:50 -05:00
Maureen Helm
cb98e9aa11 drivers: sensor: Convert fxos8700 power mode Kconfigs to dts property
Converts fxos8700 power mode options (normal, low noise low power, high
resolution, low power) from Kconfigs to an optional device tree
property.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 16:51:50 -05:00
Maureen Helm
6199de14c4 drivers: sensor: Convert fxos8700 range Kconfigs to dts property
Converts fxos8700 range options (2g, 4g, 8g mode) from Kconfigs to an
optional device tree property.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 16:51:50 -05:00
Maureen Helm
d4b9d197f3 drivers: sensor: Convert fxos8700 pulse Kconfigs to dts properties
Converts fxos8700 pulse detection options from Kconfigs to optional
device tree properties.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 16:51:50 -05:00
Andrzej Puzdrowski
9b332565b1 dts/arm/nordic: made sram node visible for each nrf5340 cpus
Made sram0 visible for NETWORK core target. The core might
access sram0 as shared region might be defined inside it.
Made sram1 visible for APPLICATION core target for keeping
consistence.

Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
2020-11-17 16:51:08 -05:00
Armando Visconti
df2ca14df3 dts/bindings: Fix lis2dh12 and lis3dh
LIS3DH and LIS2DH12 devices share the same driver with
LIS2DH device. So, the bindings are reusing the same
common structure (as LSM30AGR-ACCEL and LSM303DLHC-ACCEL
devices are already doing)

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-11-17 14:44:18 -06:00
Maureen Helm
2d9b89e44f dts: riscv: Remove peripheral aliases from OpenISA RV32M1 SoC
Removes peripheral aliases from the OpenISA RV32M1 SoC, which are no
longer being used after converting their associated drivers to use
DT_INST macros.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 11:31:47 -06:00
Maureen Helm
370d02743a dts: arm: Remove peripheral aliases from NXP SoCs
Removes peripheral aliases from all NXP SoCs (Kinetis, LPC, and i.MX),
which are no longer being used after converting their associated drivers
to use DT_INST macros. The watchdog alias remains because it is used by
tests/drivers/watchdog/wdt_basic_api/

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-17 11:31:47 -06:00
Martin Åberg
7e296403b7 soc: GR716A LEON3FT Microcontroller
This adds support for the GR716A fault-tolerant LEON3 microcontroller.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Martin Åberg
bf28bbbcec soc: LEON3 SPARC V8 Processor
This is a generic SOC description applicable to common LEON3 systems.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Martin Åberg
bb5a565aaa timer: Add support for GRLIB GPTIMER
This adds support for GRLIB GPTIMER general purpose timer used in
LEON3/4/5 systems.

One of the GPTIMER subtimers is used to generate periodic interrutps
for announcing ticks. Another subtimer is used as upcounter for the
cycle_get_32() service.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Martin Åberg
4888afd793 serial: Add support for GRLIB APBUART
This adds support for the GRLIB APBUART UART peripheral commonly used in
LEON3/4/5 systems.

Driver features:
- Auto-detecting debug FIFO, if configured by GRMON
- Setting and getting UART transfer attributes
- Hardware FIFO if available
- Any number of APBUART devices based on devicetree
- Error status indication
- Polled operation

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Martin Åberg
1a3784d6b7 intc: Add support for GRLIB IRQMP
This adds support for the GRLIB IRQMP interrupt controller commonly used
in LEON3/4/5 systems.

The driver supports the 15 SPARC interrupts and 16 extended interrupts.

Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
2020-11-13 14:53:55 -08:00
Steven Daglish
222c41a257 soc: arm: stm32l0: Add STM32L031 series
These MCUs have 32Kbytes of Flash and 8Kbytes of RAM. They are still
able to run a number of samples.

Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
2020-11-13 10:01:06 -06:00
Peter Bigot
ae6b236d26 dts: nordic: add CC count to RTC and TIMER nodes
The number of capture/compare registers available on a peripheral
should be exposed in devicetree.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-11-11 13:20:25 +01:00
Armando Visconti
c380142920 drivers/sensor: iis2iclx: add multi-instance
Make this driver multi-instance and use the new API.

Notes for sensorhub mode:
In case of multiples devices it is possible that some of them
has i2c slaves attached to it (sensorhub mode) but not the
others. Since the driver is configured in the same way for
all the instances (CONFIG_SENSORHUB=y), the routine that initialize
the sensorhub part does not fail anymore in case no slaves
are found for a particular instance. Instead, those non-sensorhub
driver instances will set the shub_inited flag to false and
will totally ignore the feature.

Notes for triggers:
In case of multiples devices the device pin the interrupt wire is
attached to can be different (INT1 or INT2 pin). So, this
information has been moved in DTS and then stored in the
specific instance config structure.
Currently the driver is able to handle a sngle interrupt line
at a time attached to either INT1 or INT2.
MOreover, the interrupt initialization for a driver instance proceed
only if the drdy has been configured in its DT, else it returns ok.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-11-11 13:17:18 +01:00
Gerard Marull-Paretas
4812bb5175 drivers: display: ili9xxx: add support for ILI9488 controller
Add support for the ILI9488 display controller.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-10 15:52:12 -06:00
Gerard Marull-Paretas
acb0cd65ca drivers: display: ili9xxx: generalize ILI display driver
Make driver generic for multiple ILI displays. The adopted strategy is
to share all driver code except register initialization, which has been
found to have some specific registers/values depending on the
controller.

The driver has been adjusted to support multiple compatibles.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-10 15:52:12 -06:00
Andrzej Głąbek
6207300dc3 boards: nrf5340dk_nrf5340: Add dts node for MX25R64 flash on QSPI
The nRF5340 (P)DK is equipped with the MX25R64 flash memory. Add a dts
node for that chip in the board definition as well as the missing QSPI
node in the nRF5340 SoC definition.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-11-10 21:01:37 +02:00
Maureen Helm
3498d43784 drivers: ethernet: Rework mcux driver to use DT_INST_FOREACH
Reworks the mcux ethernet driver to use DT_INST_FOREACH_STATUS_OKAY and
eliminate a lot of duplicate code between instance 0 and instance 1.

Renames the ERR_MISC interrupt to ERR due to an issue with the
underscore in the device tree preprocessor macros.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-03 11:05:55 +01:00
Gerson Fernando Budke
d8c9cb8d89 drivers: wifi: eswifi: Add uart bus interface
Add uart bus interface to extended esWIFI driver.  This enables all
Inventek modules with IWIN AT Commands firmware.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-11-03 11:05:43 +01:00
Martí Bolívar
5d74da4681 dts: update vendor-prefixes.txt
Make the formatting consistent and add a missing prefix we are using.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-11-02 14:26:33 -05:00
Gerard Marull-Paretas
c8687bc2e4 drivers: ethernet: stm32: add support for DT pinctrl
Add support for configuring Ethernet pins using DT pinctrl entries. Note
that F1 series pinctrl support is not handled as the driver does not
support F1.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-30 15:54:13 +01:00
Andreas Dröscher
a812f3d7b6 adc-mcux: add support for adc16 channel multiplex
Channels 4..7 are multiplexed on adc16. The NXP HAL exposes
ADC16_SetChannelMuxMode but this function is not yet included
in Zephy. The following patch adds channel-mux-b to the dts
enabling the use of the alternate channels of 16 bit adc.

Signed-off-by: Andreas Dröscher <github@anticat.ch>
2020-10-29 13:43:24 -05:00
Kumar Gala
33db7b5b01 scripts: edtlib: Add support for 'deprecated'
Add the ability to mark a property as 'deprecated' to get a warning that
it will be removed in the future.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-29 11:06:32 -05:00
Erwan Gouriou
4c9925bcd3 dts/bindings/mmc: stm32: Add pinctrl-0 support
Update binding to support pinctrl-0 property.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-29 09:21:27 +01:00
Maureen Helm
25ddc4e0f5 dts: arm: Use DT_SIZE macros for nxp internal memories
Refactors nxp i.mx, kinetis, and lpc soc-level device trees to use
DT_SIZE_K and DT_SIZE_M macros to define internal memory sizes. This is
self documenting and easier to read.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-28 11:13:07 -05:00
Erwan Gouriou
9f6ffccda3 dts/bindings/i2s: stm32: Add pinctrl-0 property
Aim is to enable dt based pinctrl on stm32 i2s driver

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-28 09:29:56 -05:00
Peter A. Bigot
f951566e56 drivers: regulator: add GPIO-controlled regulator driver
This provides structure for the regulator device hierarchy and a
driver for GPIO-controlled regulators along with its binding.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-10-28 15:22:53 +01:00
Peter A. Bigot
b7639551ee drivers: add infrastructure for regulator devices
This PR follows Linux in defining devicetree content for generic
voltage and current regulators, and an initial driver API for
controlling them.

A regulator itself may depend on a power source, so it needs to
support the properties that enable that power source.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-10-28 15:22:53 +01:00
Peter Bigot
6d3859aece devicetree: add properties for power supply control
Provide a common set of properties for various ways of controlling
power:
* supply-gpios for a GPIO specifier acting like a switch
* vin-supply for a reference to a regulator device

Document the behavior expected when these properties are present.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-10-28 15:22:53 +01:00
Kumar Gala
8a8d38e054 dts: bindings: Fix duplicate description in STM32 DMA bindings
The DMA bindings had duplicate description: keys.  Merge the two
descriptions into one to fix the issue.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-27 07:56:20 -05:00
Kumar Gala
e5eeb9d2f8 dts: bindings: test: Update vnd,serial to not require interrupts
We aren't using vnd,serial for anything currently.  Remove requiring
interrurpts property as that requirement isn't needed.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-23 08:53:38 -05:00
Kumar Gala
033d82460a dts: bindings: Fix some YAML issues
Fix a few duplicated key issues in a small handful of binding files.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-23 08:02:19 -05:00
Bent Ove Stinessen
72d5dee2e3 drivers: gpio_pca95xx: Add GPIO driver enable interrupt support
Allows the use of pin interrupt and callbacks for pca95xx family
GPIO expander chips with an interrupt line.

Enable config flag and define a gpio pin for the expander interrupt-
line (INT) in devicetree and the driver will accept pin interrupt
configurations for the expander gpio pins.

Level triggering is supported through emulation.
A worker is used to avoid waiting for I2C in ISR.

Example devicetree node:
	gpioext0: tca9539@77 {
		compatible = "nxp,pca95xx";
		label = "GPIO_EXT_0";
		reg = <0x77>;
		interrupt-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
		gpio-controller;
		#gpio-cells = <2>;
		ngpios = <16>;
	};

Fixes: #27561

Signed-off-by: Bent Ove Stinessen <bent@norbit.no>
2020-10-23 13:47:41 +02:00