Commit Graph

104 Commits

Author SHA1 Message Date
Daniel Leung
84b1bba8ee codecov: keep "inline" for ALWAYS_INLINE
Previous commit c31e659165 changed
the ALWAYS_INLINE macros to avoid functions being inlined for
the purpose of code coverage. This has a side effect of causing
the text sections of kobject_hash.c and priv_stacks_hash.c
to ballon more than 10 times in size. This is caused by
attaching the unused attribute, which results in all those
functions being in the text sections though they are never
used. So just keep the "inline" there.

This also removes -fno-inline from NO_COVERAGE_FLAGS so these
two files are not compiled with flags related to code coverage.

Fixes #15009

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-04-02 09:39:44 -04:00
Daniel Leung
c31e659165 codecov: avoid inlining functions for correct execution counts
This adds a compiler option -fno-inline for code coverage on
architectures which supports doing code coverage. This also
modifies the ALWAYS_INLINE macro to not do any inlining. This
needs to be done so code coverage can count the number of
executions to the correct lines.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2019-03-26 13:28:30 -04:00
Patrik Flykt
4344e27c26 all: Update reserved function names
Update reserved function names starting with one underscore, replacing
them as follows:
   '_k_' with 'z_'
   '_K_' with 'Z_'
   '_handler_' with 'z_handl_'
   '_Cstart' with 'z_cstart'
   '_Swap' with 'z_swap'

This renaming is done on both global and those static function names
in kernel/include and include/. Other static function names in kernel/
are renamed by removing the leading underscore. Other function names
not starting with any prefix listed above are renamed starting with
a 'z_' or 'Z_' prefix.

Function names starting with two or three leading underscores are not
automatcally renamed since these names will collide with the variants
with two or three leading underscores.

Various generator scripts have also been updated as well as perf,
linker and usb files. These are
   drivers/serial/uart_handlers.c
   include/linker/kobject-text.ld
   kernel/include/syscall_handler.h
   scripts/gen_kobject_list.py
   scripts/gen_syscall_header.py

Signed-off-by: Patrik Flykt <patrik.flykt@intel.com>
2019-03-11 13:48:42 -04:00
Ulf Magnusson
e569533de0 toolchain: Remove ref. to undefined sym. CONFIG_ISA_THUMB
This symbol has never been defined in the Git history.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-02 03:46:10 +01:00
Ulf Magnusson
e20fd5f454 toolchain: gcc: Remove ref. to undefined sym. CONFIG_ISA_ARM
This Kconfig symbol was removed in commit cb04620fbd ("remove make/
directory").

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-03-02 03:46:10 +01:00
Aurelien Jarno
992f29a1bc arch: make __ramfunc support transparent
Instead of having to enable ramfunc support manually, just make it
transparently available to users, keeping the MPU region disabled if not
used to not waste a MPU region. This however wastes 24 bytes of code
area when the MPU is disabled and 48 bytes when it is enabled, and
probably a dozen of CPU cycles during boot. I believe it is something
acceptable.

Note that when XIP is used, code is already in RAM, so the __ramfunc
keyword does nothing, but does not generate an error.

Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2019-02-22 11:36:50 -08:00
qianfan Zhao
e1cc657941 arm: Placing the functions which holds __ramfunc into '.ramfunc'
Using __ramfunc to places a function in RAM instead of Flash.
Code that for example reprograms flash at runtime can't execute
from flash, in that case must placing code into RAM.

This commit create a new section named '.ramfunc' in link scripts,
all functions has __ramfunc keyword saved in thats sections and
will load from flash to sram after the system booted.

Fixes: #10253

Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
2019-02-22 11:36:50 -08:00
Andrew Boie
41f6011c36 userspace: remove APPLICATION_MEMORY feature
This was never a long-term solution, more of a gross hack
to get test cases working until we could figure out a good
end-to-end solution for memory domains that generated
appropriate linker sections. Now that we have this with
the app shared memory feature, and have converted all tests
to remove it, delete this feature.

To date all userspace APIs have been tagged as 'experimental'
which sidesteps deprecation policies.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2019-02-08 07:04:30 -05:00
Andy Ross
b69d0da82d arch/x86_64: New architecture added
This patch adds a x86_64 architecture and qemu_x86_64 board to Zephyr.
Only the basic architecture support needed to run 64 bit code is
added; no drivers are added, though a low-level console exists and is
wired to printk().

The support is built on top of a "X86 underkernel" layer, which can be
built in isolation as a unit test on a Linux host.

Limitations:

+ Right now the SDK lacks an x86_64 toolchain.  The build will fall
  back to a host toolchain if it finds no cross compiler defined,
  which is tested to work on gcc 8.2.1 right now.

+ No x87/SSE/AVX usage is allowed.  This is a stronger limitation than
  other architectures where the instructions work from one thread even
  if the context switch code doesn't support it.  We are passing
  -no-sse to prevent gcc from automatically generating SSE
  instructions for non-floating-point purposes, which has the side
  effect of changing the ABI.  Future work to handle the FPU registers
  will need to be combined with an "application" ABI distinct from the
  kernel one (or just to require USERSPACE).

+ Paging is enabled (it has to be in long mode), but is a 1:1 mapping
  of all memory.  No MMU/USERSPACE support yet.

+ We are building with -mno-red-zone for stack size reasons, but this
  is a valuable optimization.  Enabling it requires automatic stack
  switching, which requires a TSS, which means it has to happen after
  MMU support.

+ The OS runs in 64 bit mode, but for compatibility reasons is
  compiled to the 32 bit "X32" ABI.  So while the full 64 bit
  registers and instruction set are available, C pointers are 32 bits
  long and Zephyr is constrained to run in the bottom 4G of memory.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2019-01-11 15:18:52 -05:00
Flavio Ceolin
b45a287b02 toolchain: xcc: Builtin overflow functions return boolean
The builtin_*_overflow functions when available return a
boolean. Change internal definitions to return same type.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-11-30 08:05:11 -08:00
Anas Nashif
d7fe69a6bc toolchain: xcc: __builtin_unreachable needs to be a loop
Functions are declared as noreturn but they do in fact return (when
control reaches the end of the body, since it doesn't enter an infinite
loop, it doesn't call other "noreturn" functions, etc.)

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-11-02 08:37:27 -04:00
Daniel Leung
51e47180f0 toolchain: xcc: fake __builtin_umul[ll]_overflow
XCC doesn't provide these builtins so we have to define them
with minimal functionality for testing.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2018-10-19 17:52:45 -04:00
Adithya Baglody
21d43a6fe4 include: toolchain: gcc.h: Fixed MISRA C violation.
The macros likely() and unlikely() used by the compiler for
optimization are always used inside an if condition.
According to MISRA we need to have bool type and not long.

Signed-off-by: Adithya Baglody <adithya.nagaraj.baglody@intel.com>
2018-10-17 12:17:58 -04:00
Flavio Ceolin
6fdc56d286 kernel: Using boolean types for boolean constants
Make boolean expressions use boolean types.

MISRA-C rule 14.4

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-28 06:28:41 +05:30
Flavio Ceolin
67ca176754 headers: Fix headers across the project
Any word started with underscore followed by and uppercase letter or a
second underscore is a reserved word according with C99.

Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
2018-09-17 15:49:26 -04:00
Kumar Gala
6c6a66623a toolchain: gcc: check if __weak is defined
Avoid build conflict when __weak is defined by someone else.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2018-06-28 09:13:17 -05:00
Paul Sokolovsky
a37e037264 toolchain: gcc: Add compiler barrier at the end of UNALIGNED_PUT()
compiler_barrier() is itself defined down in this file. Without
adding it, newer versions of GCC (7+) for ARM Cortex-M may mistakenly
coalesce multiple strb/strh/str (store byte/half-word/word)
instructions, which support unaligned access on some
sub-architectures (Cortex-M3 and higher, but not on Cortex-M0),
into strd (store double), which doesn't support unaligned access.

Fixes: #6307

Signed-off-by: Paul Sokolovsky <paul.sokolovsky@linaro.org>
2018-06-08 13:01:07 -05:00
Andy Ross
718a4cd245 include/toolchain/gcc.h: Fix static assert detection
The logic for using _Static_assert() was a little broken.  We were
using it when on GCC 4.6+ AND when __STDC_VERSION__ said we were on
C99 or better.  But it's not a C99 feature, it's a C11 feature.  And
if GCC provides it as an extension, that's unrelated to a particular
language version.  This should have been "GCC 4.6+ OR C11+".

This actually broke on the ESP-32 IDF toolchain, where (when using
-std=c99) the compiler was actually defining a C99 macro instead of
the C11 one, and choosing to use the wrong (and independently broken)
handling incorrectly.  Fixes #8093.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2018-06-04 11:56:43 -04:00
Rajavardhan Gundi
08172cdf83 xtensa: provide XCC compiler support for Xtensa
This patchset provides Xtensa's xcc compiler support for Xtensa
projects in Cmake. This requires the below environment variables
to be defined aptly. The appropriate xcc license information also
need to be supplied.

ZEPHYR_GCC_VARIANT=xcc
TOOLCHAIN_VER=RF-2015.3-linux
XTENSA_CORE=cavs21_LX6HiFi3_RF3_WB16
XTENSA_SYSTEM=/opt/xtensa/XtDevTools/install/tools/
		RF-2015.3-linux/XtensaTools/config/
XTENSA_BUILD_PATHS=/opt/xtensa/XtDevTools/install/builds/

Change-Id: Ib3c10e8095439b0e32276ff37c00eca8420773ec
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-05-01 16:46:41 -04:00
Leandro Pereira
05169a02ce toolchain: common: Allow multiple uses of BUILD_ASSERT() in same scope
BUILD_ASSERT() was always defining a type with the name
__build_assert_failure, causing issues if more than one assertion were
used in the same scope.

Also, use an enum instead of a typedef to avoid (possibly spurious)
warnings such as these:

  variably modified ‘__build_assert_failure1’ at file scope [-Werror]

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-04-24 04:04:36 +05:30
Leandro Pereira
666274fa60 toolchain: gcc: Only use _Static_assert if building with C11
Zephyr currently builds as C99, whereas _Static_assert is a C11
feature.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-04-24 04:04:36 +05:30
Leandro Pereira
81f4b11126 include: toolchain: common: Remove deprecated __stack macro
This macro has been deprecated in favor of K_DECLARE_STACK; should have
been removed by 1.11.

Signed-off-by: Leandro Pereira <leandro.pereira@intel.com>
2018-04-23 10:11:08 -07:00
Michael Hope
5f67a6119d include: improve compatibility with C++ apps.
This patch lets a C++ application use more of Zephyr by adding guards
and changeing some constructs to the C++11 equivalent.

Changes include:

- Adding guards
- Switching to static_assert
- Switching to a template for ARRAY_SIZE as g++ doesn't have the
  builtin.
- Re-ordering designated initialisers to match the struct field order
  as G++ only supports simple designated initialisers.

Signed-off-by: Michael Hope <mlhx@google.com>
2018-04-09 23:21:52 -04:00
Anas Nashif
ce74393267 toolchain: gcc/common: add header guard
Added guards to the toolchain/gcc.h and toolchain/common.h

Those files should never be included directly, but a guard is useful
regardless.

Fixes #5130

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2018-02-10 11:14:32 -05:00
Alberto Escolar Piedras
76f7644118 arch: native: Run Zephyr natively in a POSIX OS
A new arch (posix) which relies on pthreads to emulate the context
switching
A new soc for it (inf_clock) which emulates a CPU running at an
infinely high clock (so when the CPU is awaken it runs till completion
in 0 time)
A new board, which provides a trivial system tick timer and
irq generation.

Origin: Original

Fixes #1891

Signed-off-by: Alberto Escolar Piedras <alpi@oticon.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2017-12-27 14:16:08 -05:00
Inaky Perez-Gonzalez
7bc28cf388 syscalls: REVERTME: clean up warnings when building unit tests
This is a temporary hack until #5006 is resolved (possibly using

https://github.com/zephyrproject-rtos/zephyr/issues/5006

Unit testing (BOARD == unit_testing) doesn't need the system call
definitions. Because we foward declare with __syscall them as "static
inline" (from common.h), the compilers will complain that the
definition is missing.

Change to only define __syscall as "static inline" if we are not
builing a unit test to avoid said warnings.

Signed-off-by: Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
2017-11-15 19:09:12 -05:00
Andrew Boie
990bf16206 kernel: abolish __syscall_inline
This used to exist because in earlier versions of the system call
interfaces, an "extern" declaration of the system call implementation
function would precede the real inline version of the implementation.
The compiler would not like this and would throw "static declaration
of ‘foo’ follows non-static declaration". So alternate macros were
needed which declare the implementation function as 'static inline'
instead of extern.

However, currently the inline version of these system call
implementations appear first, the K_SYSCALL_DECLARE() macros appear in
the header generated by gen_syscalls.py, which is always included at the
end of the header file. The compiler does not complain if a
static inline function is succeeded by an extern prototype of the
same function. This lets us simplify the generated system call
macros and just use __syscall everywhere.

The disassembly of this was checked on x86 to ensure that for
kernel-only or CONFIG_USERSPACE=n scenarios, everything is still being
inlined as expected.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-10-03 16:16:03 -04:00
Andrew Boie
9928023421 kernel: make 'static inline' implicit to __syscall
The fact that these are all static inline functions internally is an
implementation detail.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-29 15:09:44 -07:00
Andrew Boie
fa94ee7460 syscalls: greatly simplify system call declaration
To define a system call, it's now sufficient to simply tag the inline
prototype with "__syscall" or "__syscall_inline" and include a special
generated header at the end of the header file.

The system call dispatch table and enumeration of system call IDs is now
automatically generated.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-09-29 13:02:20 -07:00
Andrew Boie
8b141dd83e xcc: fix __in_section_unique() and __COUNTER__
XCC assembler freaks out if a section name has __FILE__ in it,
forward slashes and quotation marks confuse it and result in
build errors.

This is not a perfect fix, its possible for two sections to collide,
but at worst this will result is some unnecessary space in noinit,
fooling gc-sections.

XCC also doesn't support __COUNTER__, use __LINE__ as a substitute.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-08-16 10:59:10 -07:00
Andrew Boie
7ce3a79d80 toolchain.h: intoduce __kernel macros
In CONFIG_APPLICATION_MEMORY scenarios, these force
objects to be in kernel memory space.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-15 12:17:54 -07:00
Andrew Boie
2cb03c5cd6 toolchain.h: fix __in_section_unique()
_FILE_PATH_HASH appears to be a legacy Diab-ism that doesn't
expand to anything in GCC.

As a result, when linking the combined binary, it's quite
possible that objects in separate C files would be merged
instead of truly being in their own section. This can confound
--gc-sections and result in unused objects still being in
the final binary if one of the other objects with the same
generated section name was actually used.

We instead just use __FILE__. This results in sometimes absurdly-
long section names in the intermediate .o files, but there is no
actual limit to how long section names in ELF binaries can be;
they are not stored directly in headers but instead referenced
as an offset in the .shstrtab section, which has all the section
names stored in it.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-07-15 12:17:54 -07:00
Andrew Boie
680ca8c944 toolchain/common.h: deprecate __stack
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 18:53:28 -04:00
Andrew Boie
e0185d4c76 toolchain: gcc: add __DEPRECATED_MACRO
Add a macro which signals to the compiler that use of the macro is
deprecated.

Example:

  #define FOO __DEPRECATED_MACRO bar

Defines FOO to 'bar' but emits a warning if used in code.

Cannot filter out with -Wno-deprecated, so be careful with -Werror.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-06-09 18:53:28 -04:00
Andrew Boie
a2b324035c xtensa: move byte-order macros out of arch.h
These are macros that are expected to be defined at all times by
the compiler. We need them at the very beginning of kernel.h for
the k_thread definition, before it's possible to include arch.h.

Make a special toolchain header for XCC compiler and place these
defines in there. Otherwise inherit all the other GCC defines.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-05-11 12:47:23 -04:00
Max Filippov
5c6276da72 toolchain: don't define __stack outside C code
__stack is defined as a C language attribute for on-stack arrays. Don't
define it outside C source code.
This definition conflicts with __stack symbol defined in xtensa linker.ld
files.

Change-Id: I59fe34603bc2bb5732ed45c7974de5f8b25d77ed
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2017-04-20 16:01:17 +00:00
Marti Bolivar
2a9bb7af3d toolchain: override static assertions for GCC
Provide a BUILD_ASSERT and BUILD_ASSERT_MSG that are based on
_Static_assert when that's available, as its output is easier to read.

Change-Id: Ifa96d5073b1341cab2a90e4dcd04752ee80c69bb
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-04-01 20:35:45 +00:00
Marti Bolivar
7e61e70b15 toolchain: add BUILD_ASSERT_MSG()
Like BUILD_ASSERT(), but with a message to emit on failure.

The base implementation swallows the message; compiler headers can
override it when they can do better.

Change-Id: Ib724e48554da77a51afa01468b1d5b7806f9de6b
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-04-01 20:35:45 +00:00
Marti Bolivar
f8c9c5444a toolchain: allow compiler to provide BUILD_ASSERT
Change-Id: Id71d5499d0bd8141062f854a814bd882db470323
Signed-off-by: Marti Bolivar <marti.bolivar@linaro.org>
2017-04-01 20:35:44 +00:00
Benjamin Walsh
c73980654c gcc: add compiler_barrier() macro
Prevent compiler from reordering memory access instructions across
critical points.

Change-Id: Id776fe59f51315c8bd2353ea3149cf4aad52e6ba
Signed-off-by: Benjamin Walsh <walsh.benj@gmail.com>
2017-02-16 04:56:20 +00:00
Andrew Boie
42562b9367 xtensa: fix numerous checkpatch issues
Change-Id: I903f5f0692849fb9e7bf5d978b63b12bf1bd6e33
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-13 11:39:03 -08:00
Mazen NEIFER
dc391f566c Xtensa port: Added support for Xtensa architecture in zephyr include files.
Change-Id: I1ac677cd6da5222707fe31ead71dc354f7c94443
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Mazen NEIFER
c024e429c9 Xtensa port: Added support for Xtensa cores in toolchain/gcc.h.
Change-Id: Ic76934411e79c288e1440e21ee38e9a95a0399b9
Signed-off-by: Mazen NEIFER <mazen@nestwave.com>
2017-02-13 08:04:27 -08:00
Andrew Boie
d8027a29f3 toolchain: gcc.h: add indirection to _GENERIC_SECTION() macro
Change-Id: Ic30874cafb4a79213feb93666903816d297084f6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-08 19:10:55 +00:00
Andrew Boie
3c6f572361 section_tags.h: cleanup
Some stuff that was platform-specific is made common, and some repeated
code was made a macro. __in_section() is used elsewhere in the codebase
and its 2nd and 3rd arguments are not necessarily filename/counter.

GCC-specific stuff moved to the toolchain header.

Change-Id: Ibfae919b6dd8a77210801c14e9a1128b43bd63f6
Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2017-02-08 19:10:43 +00:00
David B. Kinder
ac74d8b652 license: Replace Apache boilerplate with SPDX tag
Replace the existing Apache 2.0 boilerplate header with an SPDX tag
throughout the zephyr code tree. This patch was generated via a
script run over the master branch.

Also updated doc/porting/application.rst that had a dependency on
line numbers in a literal include.

Manually updated subsys/logging/sys_log.c that had a malformed
header in the original file.  Also cleanup several cases that already
had a SPDX tag and we either got a duplicate or missed updating.

Jira: ZEP-1457

Change-Id: I6131a1d4ee0e58f5b938300c2d2fc77d2e69572c
Signed-off-by: David B. Kinder <david.b.kinder@intel.com>
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2017-01-19 03:50:58 +00:00
Jean-Paul Etienne
cd83e85edc arch: added support for the riscv32 architecture
RISC-V is an open-source instruction set architecture.
Added support for the 32bit version of RISC-V to Zephyr.

1) exceptions/interrupts/faults are handled at the architecture
   level via the __irq_wrapper handler. Context saving/restoring
   of registers can be handled at both architecture and SOC levels.
   If SOC-specific registers need to be saved, SOC level needs to
   provide __soc_save_context and __soc_restore_context functions
   that shall be accounted by the architecture level, when
   corresponding config variable RISCV_SOC_CONTEXT_SAVE is set.

2) As RISC-V architecture does not provide a clear ISA specification
   about interrupt handling, each RISC-V SOC handles it in its own
   way. Hence, at the architecture level, the __irq_wrapper handler
   expects the following functions to be provided by the SOC level:
   __soc_is_irq: to check if the exception is the result of an
                 interrupt or not.
   __soc_handle_irq: handle pending IRQ at SOC level (ex: clear
                     pending IRQ in SOC-specific IRQ register)

3) Thread/task scheduling, as well as IRQ offloading are handled via
   the RISC-V system call ("ecall"), which is also handled via the
   __irq_wrapper handler. The _Swap asm function just calls "ecall"
   to generate an exception.

4) As there is no conventional way of handling CPU power save in
   RISC-V, the default nano_cpu_idle and nano_cpu_atomic_idle
   functions just unlock interrupts and return to the caller, without
   issuing any CPU power saving instruction. Nonetheless, to allow
   SOC-level to implement proper CPU power save, nano_cpu_idle and
   nano_cpu_atomic_idle functions are defined as __weak
   at the architecture level.

Change-Id: I980a161d0009f3f404ad22b226a6229fbb492389
Signed-off-by: Jean-Paul Etienne <fractalclone@gmail.com>
2017-01-13 19:52:23 +00:00
Carles Cufi
680270f809 toolchain: Add a popcount macro for GCC
Hamming Weight or "popcount" consists in counting the number of bits set
to 1 in a particular word. This commit adds a macro to be able to use
the existing builtin for this purpose with the GCC compiler.

Change-Id: Iec64c19e897de2bc02e981071465bbe230ee9add
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-12-12 20:07:53 +00:00
Peter Mitsis
6704ff462e kernel: Add __unused tag
The '__unused' tag can be used to inform the compiler that a variable
might be deliberately unused. It can be used instead of ARG_UNUSED().

Change-Id: I0ec4ee92dcec29b5f9cbda362d0d6b051055628a
Signed-off-by: Peter Mitsis <peter.mitsis@windriver.com>
2016-10-03 20:22:05 +00:00
Carles Cufi
bb9f432dc1 toolchain: Add BUILD_ASSERT macro for compile-time checks
This new macro will trigger a build failure if the compile-time
check fails. Useful for checking static conditions such as
structure sizes or offsets.

Change-Id: I417ea816003b97beb1b5f15bc583c38691f0b8a9
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2016-10-03 19:41:08 +00:00