Commit Graph

1638 Commits

Author SHA1 Message Date
Peter Bigot
10075991cc drivers: gpio_esp32: add support for pin validation
Add a config structure for each port and use the devicetree GPIO pin
count to initialize it.  Simplify device initialization by using
instance number as only variation point.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
808a88abd4 dts: binding: gpio: add default for ngpios property
Almost all drivers support 32 pins, though some support less.
Eventually this should be specified in every SOC binding, but until
then provide a default so GPIO drivers can be updated to use this.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
c273b5d885 drivers: sensor: mcp9808: update to new GPIO API
Since this was converted to the setup/handle/process idiom in master
the conversion is straightforward.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Armando Visconti
3fdcbe5a79 driver/sensor: lis2ds12: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
6afbd053e4 drivers: sensor: isl29035: update to new GPIO API
Document alert pin behavior, switch to new API.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Johann Fischer
664a1cf0db drivers: amg88xx: convert to new GPIO API
Convert AMG88XX sensor driver to new GPIO API.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-02-05 12:00:36 +01:00
Johann Fischer
afe53230b3 drivers: ti_hdc: convert to new GPIO API
Convert TI HDC sensor driver to new GPIO API.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-02-05 12:00:36 +01:00
Kevin Townsend
f800c7266e drivers: hmc5883l: update to new GPIO API
This commit updates the HMC5883L driver to use the new GPIO API.

Also add a note explicitly describing the active state of the DRDY
pin in the binding file.

Tested on frdm_k64f.

Signed-off-by: Kevin Townsend <kevin@ktownsend.com>
2020-02-05 12:00:36 +01:00
Armando Visconti
7fa48d4d6e driver/sensor: lis2mdl: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
4b5393c228 sensor: adxl372: update for new GPIO API
Update sample overlay for missing chip select and to deconflict with
UART TXD.  Add GPIO flags to configuration state.  Replace callback
enable with interrupt enable.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
de7e3e7693 sensor: adxl362: update for new GPIO API
Add a sample overlay.  Add GPIO flags to configuration state.  Replace
callback enable with interrupt enable.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Armando Visconti
a08aec9999 driver/sensor: stts751: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
c44290f75d drivers: sensor: dht: update to new GPIO API
Document IO signal behavior, switch to new API.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Maureen Helm
0f38786889 drivers: sensor: Convert fxas21002 to new gpio api
Converts the fxas21002 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.

Tested on the hexiwear_k64 board.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-02-05 12:00:36 +01:00
Armando Visconti
b0ad7bb594 driver/sensor: lis3mdl: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
6dd1f66a3c drivers: sensor: bmi160: convert to new GPIO API
Document interrupt signal and replace legacy calls with new API.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter A. Bigot
44cf206c2e x86: apollo_lake: add nexus map for GPIO nodes
This maps devicetree GPIO phandle arrays from the full controller pin
range to the sub-controllers required by Zephyr's limit of 32 pins per
controller device.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-02-05 12:00:36 +01:00
Daniel Leung
07cb01b079 x86: apollo_lake: changes GPIO definition in DTS
This breaks down the GPIO controller definition in DTS into
multiple entries. This allows these controllers to be
referenced by other DTS, and test board overlay files.
And also we can remove the entries in the dts fixup file.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-05 12:00:36 +01:00
Daniel Leung
19f3a43199 dts: x86/apollo_lake: update UART and I2C unit address
There were complains about the unit-address and first reg
not matching. So update the DTS file to match.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
1cf43985e9 drivers: sensor: lsm6dsl: update to new GPIO API
Correct IRQ active level to default active-high, switch to new
interrupt configuration.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Johann Fischer
2a117748f6 drivers: apds9960: convert to new GPIO API
Convert APDS9960 sensor driver to new GPIO API.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-02-05 12:00:36 +01:00
Maureen Helm
cadbc96d66 drivers: sensor: Convert fxos8700 to new gpio api
Converts the fxos8700 sensor driver to the new gpio api. Updates device
trees for all boards with this sensor to active low gpio interrupts by
default.

Tested on frdm_k64f and rv32m1_vega_ri5cy boards. The latter verifies
that the reset output works correctly.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-02-05 12:00:36 +01:00
Maureen Helm
4b29b9faec disk: Convert usdhc driver to new gpio api
Converts the usdhc driver to the new gpio api. Updates the
device tree for the mimxrt1050_evk board to set appropriate active
high/low polarity for the power and card detect pins.

Note that the driver doesn't actually support interrupts yet. It
initializes a gpio callback for the card detect pin, but never actually
enables the gpio interrupt. This incomplete behavior is left as-is,
since the purpose of this patch is only to convert the driver to the new
gpio api, not to add new features.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-02-05 12:00:36 +01:00
Armando Visconti
0ae55c7ce9 driver/sensor: iis3dhhc: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Armando Visconti
f5dc6580a0 driver/sensor: lsm6dso: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Armando Visconti
cde71b4f75 driver/sensor: lps22hh: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Armando Visconti
e690fab6b1 driver/sensor: lis2dw12: update to use new GPIO API
Get rid of all the deprecated functions and definitions
replacing them with the new ones.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-02-05 12:00:36 +01:00
Robert Winkler
94b8832585 boards: litex_vexriscv: Enable LiteX GPIO driver
Enable LiteX GPIO driver in litex_vexriscv board.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2020-02-05 12:00:36 +01:00
Robert Winkler
e8d0eb1db1 drivers: gpio: Add LiteX GPIO driver
This commits adds GPIO driver for LiteX SoC builder.

Due to the fact that GPIO in LiteX is unidirectional and can be
configured with different pins amount per port, additional entries
were added to the dts file.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
Signed-off-by: Piotr Zierhoffer <pzierhoffer@antmicro.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
7821104ee9 drivers: gpio_sx1509b: add support for pin configuration on device init
IO extenders may provide input signals to LEDs or sensors where
leaving the signal undriven may result in increased power consumption
or misbehavior.  The SX1509B powers up with all signals configured as
inputs.  Provide a way to indicate which pins should be set as output,
and their initial signal level, when the device is configured.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Peter Bigot
a49b364244 drivers: sensor: sht3xd: convert to new GPIO APIO
Update ALERT active level in all devicetree files.  Capture GPIO flags
in static configuration.  Add internal API to enable and disable
interrupt, to release the handlers when an alert occurs, and to
re-enable the signal when the handler completes.  Check for alerts
received during periods when the interrupt was disabled.

Extend the example to handle both above and below range triggers and
alerts that are present on startup.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Martí Bolívar
1d2a551c65 drivers: led_strip: modernize and fix up ws2812 drivers/sample
Convert the GPIO based driver to the new GPIO API. (Only the
gpio_configure() call is affected).

Move configuration to DT where appropriate for both SPI and GPIO
drivers, only leaving the SPI vs. GPIO decision in Kconfig (in
addition to the basic enable for the driver.) Move some files around
to clean up as a result of this change.

led_ws2812 sample changes:

- make the pattern easier to look at by emitting less light

- use led_strip alias from DT to get strip device, allocate
  appropriate struct led_rgb buffer, etc.

- move the pins around and remove 96b_carbon support (I have no board
  to test with)

GPIO driver specific changes:

- str is required to write OUTSET/OUTCLR, not strb. The registers
  are word-sized.

- the str[b] registers must all be in r0-r7, so "l" is the correct GCC
  inline assembly constraint for both "base" and "pin"

SPI driver specific changes:

- match the GPIO driver in not supporting the update_channels API
  method, which never made sense for this type of strip

- return -ENOMEM when the user tries to send more pixel data
  than we have buffer space for instead of -EINVAL

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Karsten Koenig
4897c95462 drivers: can: mcp2515: Switch to new GPIO API
Mark the INT signal to be active low and use the new functions to get
gpio state and configure the gpio interrupt flanks.

Signed-off-by: Karsten Koenig <karsten.koenig.030@gmail.com>
2020-02-05 12:00:36 +01:00
Daniel Leung
7b9cc3198f dts: add binding for PCA95xx series I2C-based GPIO expanders
This adds the DTS binding for the PCA95xx series I2C-based GPIO
expanders.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-02-05 12:00:36 +01:00
Peter Bigot
ff4294a7fe drivers: sensor: hts221: update to new GPIO API
Correct DRDY active level to default active-high, switch to new
interrupt configuration.

Also fix a common bug where an already-active DRDY signal is not
properly handled.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-02-05 12:00:36 +01:00
Gerson Fernando Budke
527ebe131d dts: arm: atmel: Add sam4e device tree
Add device tree for Atmel sam4e SoC

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 17:51:41 -05:00
Gerson Fernando Budke
47c034e4d9 dts: arm: atmel: Add samv71 device tree
Add device tree for Atmel samv71 SoC.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2020-02-04 08:56:19 -06:00
Oane Kingma
1421dfb3f1 boards: efr32_slwstk6061a: Enable watchdog
This commit adds the following:
- EFR32FG1P SoC support for the watchdog
- efr32_slwstk6061a board support for the watchdog

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-02-03 11:25:40 -08:00
Christian Taedcke
6b382bc9e7 boards: efr32mg_sltb004a: Enable watchdog
This commit adds the following:
- EFR32MG SoC support for the watchdog
- efr32mg_sltb004a board support for the watchdog

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-02-03 11:25:40 -08:00
Oane Kingma
fff0a2b5e7 dts / boards / soc: Add support for SiLabs Gecko watchdog
This commit adds the following:
- device tree bindings for Gecko watchdog driver
- EFM32PG SOC support for the watchdog driver
- EFM32PG board support for the watchdog driver
- DTS aliases for testing with default watchdog driver test

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-02-03 11:25:40 -08:00
Peter A. Bigot
6438195701 devicetree: add voltage-divider binding
Define a binding for a voltage divider circuit with one or more analog
input channels.  Add devicetree nodes for several boards that have
battery voltage measurement support.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-02-03 16:26:51 +01:00
Maureen Helm
ca43b7ceb4 dts: Add bindings for ft5336 touch panel controller
Adds device tree bindings for the focaltech ft5336 touch panel
controller, which will be used on several i.mx rt evk boards.

Moves address-cells and size-cells properties from the base kscan
bindings to the specific microchip,xec bindings since they are not
required for the ft5336.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-02-01 08:50:16 -05:00
Carlo Caione
0958673ee1 arch: arm64: Enable shared IRQ line for UART
Enable the shared IRQ for the UART line and enable the remaining tasks
that depends on a separated declaration of the TX/RX/Err/... IRQs.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione
a61290e1a3 arch: arm64: Add support for qemu_cortex_a53 board
This patch introduces support for the qemu_cortex_a53 board emulated
using QEMU (virt platform) adding SoC, board and DTS files.

| ./scripts/sanitycheck -p qemu_cortex_a53
|
| Total complete:  190/ 190  100%  skipped:   40, failed:    0
| 150 of 150 tests passed (100.00%), 0 failed,
|     40 skipped with 0 warnings in 580.93 seconds

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Carlo Caione
6f36300219 drivers: timer: Add per-core ARM architected timer
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.

This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).

So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
Anas Nashif
aa14022c8a intel_s1000: various fixes for build errors
Lot of misdefined variables that went in undetected due to lack of CI on
this board. Fix them and test build with new SDK.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-31 14:51:37 -05:00
Johann Fischer
c68ac431cc drivers: display: add support for GD7965 display controller
Add support for GD7965 display controller.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-01-31 11:37:35 -05:00
Ivo Clarysse
0c8a99582e dts: arm: stm32f4: add CAN_2 controller
Add the CAN controller device tree node for CAN_2 of the STM32F4 SoC
series.

Signed-off-by: Ivo Clarysse <ivo@bcdevices.com>
2020-01-30 14:27:28 -05:00
Carles Cufi
8129a78a51 dts: bindings: qspi-nor: Replace tabs with spaces
YAML doesn't support tabs, replace them with spaces.

Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
2020-01-30 13:05:12 -06:00
Christian Taedcke
fbbf68d63c soc: silabs_exx32: Support all gpio ports on efm32jg and efm32pg
This commit adds the remaining gpio ports I, J and K to the device
tree and dts_fixup headers of the EFM32JG12B and EFM32PG12B SoCs.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-01-30 09:15:53 -06:00
Benjamin Valentin
edb8df102f dts: atmel_sam0: fix location of flash and sram blocks
The blocks were moved into the soc block in samd5x.dtsi,
so we also have to move them for the the actual SoC definitions
that inherit from that.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-01-30 08:44:30 -06:00
Francois Ramu
fafd20ca93 soc: arm: st_stm32: add stm32g474 series
This patch introduces the support of the STM32G474
     device from STMicroelectronics.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-30 08:30:15 -06:00
Christian Taedcke
4ead400d79 arm: exx32: Add Silabs EFM32JG12B soc files
The Silicon Labs EFM32 Jade Gecko MCU includes:

    * Cortex-M3 core at 40MHz
    * up to 1024KB of flash and 256KB of RAM
    * multiple low power peripherals

This is basically the same as the EFM32 Pearl Gecko, but with an ARM
Cortex-M3 core instead of a Cortex-M4F.

Signed-off-by: Christian Taedcke <christian.taedcke@lemonbeat.com>
2020-01-30 07:06:54 -06:00
Scott Branden
54ce0b2d34 arm: Add Broadcom Valkyrie SoC support
Add initial support for Broadcom Valkyrie SoC as part of Zephyr.

Signed-off-by: Scott Branden <scott.branden@broadcom.com>
2020-01-30 03:54:01 -06:00
Krzysztof Chruscinski
dcdc61cfdb drivers: serial: nrf_uarte: Allow TX only instance
Extended nrf_uarte driver to support TX only UARTE instances.
When RX pin is not provided then RX is not started at all. This
allows to achieve low power with logging/console enabled.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-01-29 12:03:05 -06:00
Kwon Tae-young
271bd8bcea soc: stm32l1: Add support for STM32 IWDG
The driver for STM32's independent watchdog already exists and is
compatible with the stm32l1 SoC. Enable the independent watchdog
for the stm32l1 series for use with this driver.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2020-01-29 11:20:57 -06:00
Kamil Lazowski
5b4f4253c1 drivers: flash: add Nordic JEDEC QSPI NOR flash driver
Most JEDEC NOR flash devices uses not only typical SPI mode
(MISO,MOSI,SCK and CS), but also QSPI mode (IO0,IO1,IO2,IO3,SCK and CS).
QSPI mode uses more data lines and as a result provide higher
throughput. If this were not enough, Nordic chips provide
hardware acceleration for read/write/erase functions, what
gives significant performance boost.
It does a lot of things "behind the scene", i.e when user has written
some data to the flash and would like to read them back, it has to wait
until the flash is ready by reading WIP bit in Status Register.
This driver does it automatically.

Signed-off-by: Kamil Lazowski <Kamil.Lazowski@nordicsemi.no>
2020-01-29 15:15:49 +01:00
Andrzej Głąbek
7899b1f5b6 modules: hal_nordic: Update nrfx to version 2.1.0
Update the hal_nordic module revision, to switch to nrfx 2.1.0.

Because the list of peripherals for nRF5340 has changed as follows:
- SPIM2 has been renamed to SPIM4
- SPIM2-3, SPIS2-3, TWIM2-3, TWIS2-3, and UARTE2-3 have been added
a couple of related corrections needed to be applied in dts and Kconfig
files, plus the spi_nrfx_spim driver has been extended with the support
for SPIM4.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-01-29 15:00:45 +01:00
Henrik Brix Andersen
5a82424767 dts: arm: stm32f3: add can controller
Add the CAN controller device tree node for CAN_1 of the STM32F3 SoC
series.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-29 09:47:27 +01:00
Tomasz Bursztyka
1d679156f8 dts/xtensa: Adding USB node to Intel s1000
The SoS provides one instance of the DW controller.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka
c7cf2bc5f0 dts/bindings: Adding DesignWare USB node description
Corresponding driver will be configured via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka
8d10e66371 drivers/interrupt-controller: Make irqs DT configured in DW
DesignWare driver can manage different amount of irqs so let's make it
configurable via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka
9a57119189 dts: Add the 2 other DW DMA nodes to intel s1000
There are 2 other DMA controller found on this SoC.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka
0d4bf57709 dts: Setup DMA node for the Intel S1000
Details of the node are configured via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Tomasz Bursztyka
e39571f331 dts: Add the bindings for DesignWare DMA node
This is the first step to enable the relevant driver to be configured
via DTS.

Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
2020-01-28 18:18:18 -05:00
Henrik Brix Andersen
6487ecc784 dts: arm: nxp: ke1xf: fix LPO clock frequency
The frequency of the Low Power Oscillator (LPO) is 128kHz, not 125kHz.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-28 14:47:35 -06:00
Francois Ramu
b7a3e7dc31 dts: bindings: dma add support for controller
This patch introduces the periph to/from memory dma transfer
define new values for dma cells on client side

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-28 12:58:44 -06:00
Francois Ramu
82799d2ae4 dts: bindings: dma controller supports mem2mem transfer
This checks if the DMA controller supports or not
the memory-to-memory transfers. For DMA Version1,
in the stm32f2xx, stm32f4xx, stm32f7xx series,
only DMA instance 2 is able to transfer mem-to-mem.
For other series, with DMA Version2, there is no such a limitation.

Signed-off-by: Francois Ramu <francois.ramu@st.com>
2020-01-28 12:58:44 -06:00
Ulf Magnusson
52e0dd748f dts: bindings: ps2: Replace 'should be 1/0' comments with 'const: 1/0'
Check with 'const:' that #address-cells is 1 and #size-cells is 0. That
way other values will get flagged by edtlib.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-28 12:48:53 -06:00
Jose Alberto Meza
da87abd971 dts: arm: microchip: Adjust DT IRQ priorities
Adjust default IRQ priorities.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>
2020-01-28 20:13:36 +02:00
Jonas Eriksson
3e64e751b6 soc: stm32f1: Add support for stm32f1xx SoCs
Define stm32f100xx family, tested using stm32vl_disco
(stm32f100rb).

Signed-off-by: Jonas Eriksson <jonas@upto.se>
2020-01-28 08:30:52 -06:00
Ulf Magnusson
8e476ab692 dts: bindings: semtech,sx1276: Remove redundant document separator
Not needed. Bindings are never concatenated together.

Makes the https://github.com/zephyrproject-rtos/ci-tools/pull/123 check
clean, though it only looks at changed files in PRs.

Clean up the header too.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-27 10:41:31 -06:00
Oane Kingma
437587af20 drivers/ethernet: Add support for SiLabs Giant Gecko GG11
Ethernet MAC present in Silicon Labs EFM32GG11B4xx and
EFM32GG11B8xx SoCs.

DMA based driver with support for link up/down detection.

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-01-24 10:28:33 -06:00
Oane Kingma
c52787c4d1 boards/arm: Add initial support for SiLabs Giant Gecko GG11 STK
This commit adds initial support for the Silicon Labs EFM32
Giant Gecko GG11 StarterKit.

Features supported for now are NVIC, SysTick, GPIO, Flash,
Counter, I2C, UART and Ethernet. Support for Watchdog and
ADC will follow as soon as their respective PRs are merged.

Signed-off-by: Oane Kingma <o.kingma@interay.com>
2020-01-24 10:28:33 -06:00
Peter Bigot
1a5368a07b drivers: sensor: bma280: convert from Kconfig to devicetree
Define a binding for the Bosch BMA280 sensor.  Remove the Kconfig
settings and update the driver to use the devicetree information.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-24 15:52:09 +01:00
Ulf Magnusson
e25394bca9 dts: bindings: nxp,lpc-iap: Remove deprecated 'title' field
Merge all the information into 'description:' and remove 'title:'.
Gets rid of a deprecation warning.

See commit 2934ee2cda ("dts: bindings: Remove 'title:' and put all info.
into 'description:'").

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-24 10:53:36 +01:00
Benjamin Valentin
2fef2002e8 soc: atmel_sam0: add SAM TRNG to DTS
We can use the SAM entropy node here.

Signed-off-by: Benjamin Valentin <benpicco@googlemail.com>
2020-01-23 12:40:59 +01:00
Moonkwun Jung
a67ca8f202 dts: arm: st: h7: fix stm32h7 separate cores
Currently, only the stm32h747 soc is supported in the h7 foler.
The h7 series comes with both single core and dual core products.
This change moves C-M4 core out of stm32h7.dtsi so that it can be
included by single core STM32H7 soc description.

Signed-off-by: Moonkwun Jung <mkainyh@gmail.com>
2020-01-23 09:54:39 +01:00
Henrik Brix Andersen
230b278f84 dts: arm: nxp: k6x: fix rtc dts node
Fix the RTC device tree node for the NXP K6x SoC series. This device
is compatible with nxp,kinetis-rtc.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-22 06:27:30 -06:00
Antony Pavlov
fc1cdf233d soc: arm: stm32l1: Add STM32L152Xe stuff
The STM32L151 and STM32L152 differ in that
the STM32L152 features an LCD controller.

Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
2020-01-20 18:08:43 -06:00
Erwan Gouriou
87a440b8c6 dts: stm32: Define stm32l073 as stm32l072 superset
STM32L073 soc variant is a STM32L072 with LCD peripheral.
Reflect this in dts definition by including stm32l072.dtsi
in stm32l073.dtsi.
This also allows to fix an issue on stm32l073 gpioe which
declared wrong reg definition.


Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-01-20 12:17:31 -06:00
Daniel Leung
6ecb36cbe0 dts: arm: mec1501hsz: rename I2C nodes
The I2C controllers on the MEC1501 SoC can be attached to
different I2C output line. For example, the I2C #0 controller
can be used with I2C7 physical lines out of SoC. The output
selection is done by the attribute "port_sel". This renames
the parent I2C nodes on the SoC side to refer to
the controller themselves instead of the output lines to
avoid confusion. The labels of these nodes are also renamed
to reflect the controllers.

On the board level, the DTS labels are overwritten to indicate
the actual output lines.

Aliases are also provided in both SoC and board levels to
provide shortcuts to the DTS nodes.

Signed-off-by: Daniel Leung <daniel.leung@intel.com>
2020-01-18 13:33:20 -05:00
Kumar Gala
b1602c8e39 arm: Removed support for CC2650
The SoC, driver, and board support for the CC2650 and CC2650 Sensortag
aren't currently supported and we are removing them as such.  If anyone
is interesting in supporting this platform we can easily recovery it
from git.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-18 09:27:55 -06:00
Henrik Brix Andersen
05dca5df04 dts: nxp: k6x: add temperature sensor nodes
Add device tree nodes for the internal temperature sensor in the NXP
Kinetis K6x SoC series.

A temperature sensor node is added for each ADC in the SoC to allow
the user to choose which ADC instance to use for the sensor readings.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-16 17:30:42 -06:00
Henrik Brix Andersen
ca9861f690 dts: nxp: ke1xf: add temperature sensor nodes
Add device tree nodes for the internal temperature sensor in the NXP
Kinetis KE1xF SoC series.

A temperature sensor node is added for each ADC in the SoC to allow
the user to choose which ADC instance to use for the sensor readings.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-16 17:30:42 -06:00
Henrik Brix Andersen
30e1a7f7c1 dts: bindings: add binding for the NXP Kinetis SoC temperature sensor
Add device tree binding for the internal temperature sensor found on
the NXP Kinetis SoC series.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-16 17:30:42 -06:00
Roland Ma
01049b73be dts: arm: st: Add dts and soc additions for stm32 F767ZI board
Added dts additions for stm32 nucleo f767zi board, also added
and modified soc addtions for thet board.
Updated dts reference file name.
Updated yaml to take out adc for now.

Signed-off-by: Roland Ma <rolandma@yahoo.com>
2020-01-16 22:51:13 +01:00
Andrei Gansari
5ac450ecc4 dts: lpc55s6x flash controller add
Added flash controller and all memory mapped regions to DTS.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Andrei Gansari
1cebd314c2 dts: nxp,lpc-iap.yaml
New IAP Flash device for LPC SoC.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Andrei Gansari
fb9a41dc0b dts: lpc55s69 all flash regions
Added reserved partition and bootrom partitions.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Andrei Gansari
85800622f9 dts: remove artificial include
DTS inclusion simplification for LPC55S69 cpu 0.

Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
2020-01-16 08:19:46 -06:00
Kumar Gala
5a911ec47f dts: gpio: ti,boosterpack: Remove title as its deprecated
Move title info into description as we've deprecated the title field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-15 11:37:28 -06:00
Kumar Gala
50a23de5af dts: silabs,gecko-spi-usuart: Remove title as its deprecated
Move title info into description as we've deprecated the title field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-15 11:37:28 -06:00
Kumar Gala
ae77fe1369 dts: dht: Remove title as its deprecated
Move title info into description as we've deprecated the title field.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-01-15 11:37:28 -06:00
Peter A. Bigot
11dd504f2a drivers: sensor: ccs811: use device tree for control GPIOs
Replace Kconfig GPIO pin configuration with device tree gpios.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-01-14 15:44:09 -06:00
Kwon Tae-young
cea68ea492 dts: arm: stm32: add dts support for EEPROM of STM32L0
Add eeprom to STM32L0 series.
stm32l053X8: 2k
stm32l072Xz, stm32l073Xz: 6k

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2020-01-14 11:13:42 -05:00
Benjamin Valentin
fc7f458ab3 flash: sam0: Define LOCK_REGIONS in dts
The amount of lock regions differs between different sam0 MCUs.

	saml10:  2
	saml11:  4
	samd2x:	16
	saml2x: 16
	samd5x: 32

ASF does not provide a definition for this, so create a new one
in dts.

Signed-off-by: Benjamin Valentin <benjamin.valentin@ml-pa.com>
2020-01-14 11:12:33 -05:00
Maureen Helm
b8ad9969ef drivers: counter: Refactor mcux gpt driver to use generated dts macros
Refactors the mcux gpt driver to use generated device tree macros
directly. Removes now unused dts fixup macros from i.mx rt socs.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-14 11:10:27 -05:00
Brett Witherspoon
a563247af6 dts: bindings: add GPIO binding for BoosterPack header
This header is found on TI LaunchPad development kits and BoosterPack
expansion modules. This binding allows boards to define mappings from
header pins to device GPIOs.

Signed-off-by: Brett Witherspoon <spoonb@cdspooner.com>
2020-01-14 15:45:35 +01:00
Maureen Helm
88fcded3b0 dts: boards: Define dts aliases at soc level for lpc socs
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all lpc socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-13 10:22:44 -05:00
Maureen Helm
ecd24bccd1 dts: boards: Define dts aliases at soc level for i.mx 6/7 socs
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all i.mx 6/7 socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-13 10:22:44 -05:00
Maureen Helm
201f8897cd dts: boards: Define dts aliases at soc level for i.mx rt socs
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all i.mx rt socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-13 10:22:09 -05:00
Henrik Brix Andersen
575c211f97 dts: riscv: rv32m1: add timer/pwm modules
Add device tree nodes for the Timer/PWM (TPM) modules present in the
OpenISA RV32M1 SoC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Henrik Brix Andersen
c989ab8b05 dts: bindings: add binding for RV32M1 Timer/PWM module
Add device tree binding for the Timer/PWM module (TPM) present on the
OpenISA RV32M1 SoC.

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-01-13 09:12:34 -06:00
Maureen Helm
519661748e dts: boards: Define dts aliases at soc level for kinetis socs
Defines device tree aliases for on-chip peripherals at the soc level
instead of the board level for all kinetis socs. The eliminates some
duplicate code in the board level device trees, and will allow drivers
to use device-tree generated macros directly instead of through dts
fixups.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-01-13 08:30:53 -06:00
Ioannis Glaropoulos
1e492b2b1d dts: arm: nrf5340: adding device_type property in sram nodes
Add device_type DTS property in sram0 and sram1 nodes,
for nRF5340 Application and Network CPU, respectively.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-01-13 12:48:46 +01:00
Christian Taedcke
6da94af847 drivers: spi: Add Gecko SPI driver
This commit adds SPI driver and its bindings using the USART peripheral
for Silicon Labs EFM32 and EFR32 MCUs.

Signed-off-by: Christian Taedcke <hacking@taedcke.com>
2020-01-10 07:14:35 -06:00
Ryan QIAN
7f75e4f83b soc: arm: nxp_imx: rt: add device support i.MX RT1010
- Add device support for i.MXRT1010

Signed-off-by: Ryan QIAN <jianghao.qian@nxp.com>
2020-01-09 16:29:22 -06:00
Laczen JMS
ab3ed439c8 drivers: eeprom: Unified simulator and native_posix
EEPROM simulator and native_posix have been unified to one solution,
the old eeprom,native_posix is removed.

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
2020-01-09 20:28:19 +01:00
Laczen JMS
20623dfa4c drivers: eeprom: Add support for eeprom simulator
Add support for a eeprom simulator. The PR limits the addition to
qemu_x86 but it can easily be added to other devices by defining the
eeprom simulator in the dts and setting 'CONFIG_EEPROM_SIMULATOR=y'

Signed-off-by: Laczen JMS <laczenjms@gmail.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-01-09 20:28:19 +01:00
Henrik Brix Andersen
bc2113bd46 drivers: adc: add LMP90xxx ADC driver with GPIO
Add driver for the Texas Instruments LMP90xxx series of multi-channel,
low-power 16-/24-bit sensor analog frontends (AFEs).

The functionality is split into two drivers; an ADC driver and a GPIO
driver.

Tested with LMP90080 and LMP90100.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-09 17:27:52 +01:00
Peter Bigot
fe018f51a2 drivers: sensor: mpu6050: convert to devicetree
Add a binding for the sensor and replace all Kconfig selection of
hardware parameters with devicetree property values.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-01-08 16:40:04 +01:00
Ulf Magnusson
23a5b4963b dts: edtlib: Add 'type: path' for path references
Add binding support for a 'path' property type, for properties that are
assigned node paths. Usually, paths are assigned with path references
like 'foo = &label' (common in /chosen), but plain strings are accepted
as well as long as they're valid paths.

The 'path' type is mostly for completeness at this point, but might be
useful for https://github.com/zephyrproject-rtos/zephyr/issues/21623.
The support is there already in dtlib.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-08 08:02:00 -06:00
Robert Winkler
0b6c18bd64 boards: litex_vexriscv: Enable LiteX PWM driver
This commit enables LiteX PWM driver for litex_vexriscv board.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-08 11:04:36 +01:00
Robert Winkler
56db098a55 drivers: pwm: Add driver for LiteX PWM peripherial
PWM driver for LiteX SoC builder was created.
Because LiteX supports only one channel for each PWM device,
an appropriate restriction was made.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-08 11:04:36 +01:00
Robert Winkler
34fedd6cc9 boards: litex_vexriscv: Enable LiteX I2C driver
This commit enables LiteX I2C driver for litex_vexriscv board.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-07 20:55:43 +01:00
Robert Winkler
7f8a70a74b drivers: i2c: Add driver for LiteX I2C controller
This adds I2C bitbang driver for LiteX SoC builder with its bindings.

Signed-off-by: Robert Winkler <rwinkler@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-07 20:55:43 +01:00
Henrik Brix Andersen
85e1117e94 dts: nxp: kinetis-ftm: add PWM flags cell
Add support for specifying PWM flags for the NXP Kinetis FlexTimer
(FTM) PWM driver through the device tree.

All in-tree clients of this PWM controller are active-low LEDs.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-07 18:13:18 +01:00
Stephanos Ioannidis
38f0b05b99 dts: xilinx_zynqmp: Fix incorrect RPU device tree specification.
This commit fixes the following problems with the RPU device tree:

1. The core type of the RPU of ZynqMP SoC is Cortex-R5F, not
  Cortex-R4.

2. RPU and APU use different interrupt controllers (PL390 GICv1 and
  GIC-400 GICv2, respectively) mapped to the same CPU local bus address
  region but with different offsets for the distributor and CPU
  interrupt control register sets. The GIC address mapping specified by
  the current dts is that of an APU and does not apply to the PL390
  GICv1 of an RPU (refer to the "Zynq UltraScale+ Devices Register
  Reference" document from Xilinx for more information).

For more details, refer to the issue #20217.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-07 17:17:12 +01:00
Stephanos Ioannidis
8a29685a25 dts: xilinx_zynqmp: Refactor dts to specify RPU and APU separately.
ZynqMP SoC embeds two separate processor types: Cortex-R for RPU and
Cortex-A for APU.

Since the current Zephyr architecture cannot support AMP of Cortex-R
and Cortex-A within one project, the RPU and APU should be considered
separate platforms.

This commit relocates the device tree nodes that are not common between
RPU and APU to a separate dtsi file (zynqmp_rpu.dtsi).

When Cortex-A53 APU support is added in the future, an additional dtsi
file (zynqmp_apu.dtsi) for specifying the APU device tree should be
added.

For more details, refer to the issue #20217.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
2020-01-07 17:17:12 +01:00
Pawel Czarnecki
65b47118c5 boards: litex_vexriscv: Enable LiteX PRBS driver
This enables LiteX PRBS random number generator driver
for litex_vexriscv board.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-06 13:33:25 -05:00
Pawel Czarnecki
894b488b06 drivers: entropy: Add driver for LiteX PRBS module
This adds PRBS ranom number generator driver for
LiteX SoC builder with its bindings.

Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2020-01-06 13:33:25 -05:00
Henrik Brix Andersen
ebb4126cbe soc: nxp: ke1xf: rename ftm instances to pwm to match other SoCs
Rename the NXP FTM instances in the KE1xF SoC to PWM to match the
other SoCs/boards using the FlexTimer as PWM generator.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2020-01-06 10:03:20 -06:00
Ulf Magnusson
e9dca5560b dts/bindings: ti,tmp116: Remove unused 'alert-gpios' property
Johann Fischer pointed out that the driver for this sensor
(master/drivers/sensor/tmp116/tmp116.c) doesn't use GPIOs, in
https://github.com/zephyrproject-rtos/zephyr/pull/21605, though there
seems to be an ALERT pin from looking at the datasheet
(http://www.ti.com/lit/ds/symlink/tmp116.pdf).

Remove the unused property declaration.

I was originally just going to change a 'category: optional' to
'required: false' (and 'type: compound' to 'type: phandle-array').
Either solution is fine with me. Could keep the declaration if people
are planning to use it soon.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-04 09:22:38 -05:00
Ulf Magnusson
ac09bb33cf dts/bindings: ti,tmp116: Use 'required' instead of 'category' key
'category' is deprecated. See commit fcd665a26c ("dts: bindings: Have
'required: true/false' instead of 'category: ...'").

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2020-01-03 09:43:33 -06:00
Sahaj Sarup
4dca5285f0 arm: board: 96b_stm32_sensor_mez: enable USART3
This patchset enables USART3 on the 96Boards STM32 Mezzanine.
It is broken out to J10 Grove Connector.

Changes:

- Enabled USART3 in board dts.
- Updated board index.rst with uart pinouts.
- soc dtsi: enabled usart3.

Test: Tested USART3 as console at 115200 baud

Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
2020-01-03 09:37:08 -06:00
Johann Fischer
f6807df469 drivers: display_st7789v: obtain panel settings and parameters from DT
Obtain panel settings and parameters from DT.

Signed-off-by: Johann Fischer <j.fischer@phytec.de>
2020-01-02 17:00:06 -05:00
Manivannan Sadhasivam
e47b5f7a65 drivers: lora: Add SX1276 LoRa Modem support
Add support for Semtech SX1276 LoRa Modem.

Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
2019-12-21 12:20:24 +01:00
Jack Rosenthal
53ed9e57a2 soc: stm32f0: Add support for STM32F098xx SOC
This adds a Kconfig options and device tree configs for the STM32F098
series of SoC.

Signed-off-by: Jack Rosenthal <jrosenth@chromium.org>
2019-12-20 20:27:20 -05:00
Ulf Magnusson
86dc23a15d dts: bindings: Remove "provides a base representation" from bindings
Newly-introduced stuff. See
https://github.com/zephyrproject-rtos/zephyr/pull/20793.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-20 19:45:06 -05:00
Ulf Magnusson
0ac6e6bf36 dts: bindings: Remove redundant document separators
Not needed. Prevent them from being copy-pasted.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-20 19:45:06 -05:00
Peter Bigot
0cfac519cc sensor: dht: convert from Kconfig to devicetree
Define a binding for the Aosong DHT family of temperature/humidity
sensors.  Remove the Kconfig settings, and update the driver to use
devicetree information.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-12-19 06:43:37 -06:00
Peter Bigot
bb106390a2 dts: bindings: generalize JEDEC SPI NOR descriptions
Currently most SPI NOR serial flash devices are accessed through the
spi-nor flash driver, but there are pending enhancements that will
access these devices through other driver implementations.  Several of
the descriptive properties of the flash memories are common regardless
of the interface selected.  Pull those out to a separate yaml file to
be included into the bindings for interface-specific node descriptions.

Also revise the documentation to note that the jedec,spi-nor
compatible depends on a commands set compatible with the Micron M25P80
serial nor flash; there is no JEDEC standard for these commands.
These devices do generally provide descriptive structures defined by
JESD216, but currently Zephyr doesn't make use of these structures.
The JEDEC CFI standard previously referenced in the description is not
relevant to these devices.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2019-12-19 12:37:31 +01:00
Ulf Magnusson
527343dfce dts: bindings: Replace 'child-bus:'/'parent-bus:' with 'bus:'/'on-bus:'
'child-bus:'/'parent-bus:' have been deprecated.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-19 11:02:28 +01:00
Ulf Magnusson
379145ffce scripts: edtlib: Rename 'child-bus:'/'parent-bus:' to 'bus:'/'on-bus:'
I keep mixing these up, so that's probably a sign that the names are
bad. The root of the problem is that "parent-bus" can be read as both
"this is the parent bus" and as "the parent bus is this".

Use 'bus:' for the bus "provider" and 'on-bus:' for nodes on the bus
instead, which is less confusing.

Support the old keys for backwards compatibility, along with a
deprecation warning.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-19 11:02:28 +01:00
Filip Brozovic
e541e63653 soc: arm: stm32g0: add STM32G031 SoC series
This commit adds support for the STM32G031xx SoCs
by STMicroelectronics.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-12-18 22:06:39 +01:00
Filip Brozovic
fc2dfae64f drivers: i2c: add STM32G0X I2C support
Add I2C driver support for STM32G0X SoC series.

Signed-off-by: Filip Brozovic <fbrozovic@gmail.com>
2019-12-18 22:06:27 +01:00
Sahaj Sarup
d072ab83ac arm: 96b_stm32_sensor_mez: spi: Enable SPI4
This patch enables SPI4 on the 96Boards STM32 Sensors Mezzanine.
SPI4 has been broken out to a Grove Connector on the board.

Changes:

- Updated board dts to enable spi4
- Updated board Kconfig
- Updated board documentation
- Update board pinmux
- Updated stm32f4 pinmux header file
- Updated stm32f401 dtsi
- Updated stm32f4 defconfig to enable PORTE GPIO
- Added board to spi_loopback test

Test: spi_loopback test passed

Signed-off-by: Sahaj Sarup <sahaj.sarup@linaro.org>
2019-12-18 07:34:37 -06:00
Ulf Magnusson
2934ee2cda dts: bindings: Remove 'title:' and put all info. into 'description:'
Add any useful information from 'title:' to the 'description:' strings
(e.g. explanations of acronyms), and remove 'title:' as well as any
copy-pasted "this binding gives a ..." boilerplate.

Also clean some description strings up a bit.

Some other things could probably be cleaned up (replacing 'GPIO node'
with 'GPIO controller' on controllers for consistency, for example), but
I kept things close to the original to avoid accidentally messing up.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-18 11:52:45 +01:00
Ulf Magnusson
36b7ca44b8 scripts: edtlib.py: Deprecate 'title:'
Most bindings look something like this:

    title: Foo

    description: This binding provides a base representation of Foo

That kind of description doesn't add any useful information, as it's
just the title along with some copy-pasted text. I'm not sure what "base
representation" was supposed to mean originally either.

Many bindings also put something that's closer to a description in the
title, because it's not clear what's expected or how the title is used.
In reality, the title isn't used anywhere. 'description:' on the other
hand shows up as a comment in the generated header.

Deprecate 'title:' and generate a long informative warning if it shows
up in a binding.

Next commits will clean up the 'description:' strings (bringing them
closer to 'title:' in most cases) and remove 'title:' from all bindings.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-18 11:52:45 +01:00
Mateusz Holenko
65e4178071 boards: litex_vexriscv: dts: Reorder liteeth registers
This is just a cosmetic change to avoid a warning:
"unit-address and first reg (0xb0000000)
don't match for ethernet@e0009800"

Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
2019-12-18 10:35:15 +02:00
Martin Jaeger
3d1834e5d6 dts: arm: stm32l452 dtsi files updated
Fixed warning for uppercase hex addresses and added stm32l452Xe.dtsi

Signed-off-by: Martin Jaeger <17674105+martinjaeger@users.noreply.github.com>
2019-12-13 17:02:40 -06:00
Gerson Fernando Budke
1a0e8a2e04 dts: ieee802154: rf2xx: Add DTS support
Add a dts binding file for the ATMEL AT86RF23x/212x transceivers.

Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>
2019-12-13 11:23:23 +02:00
Kwon Tae-young
a6f5c1bbf6 dts: arm: stm32: add dts support for EEPROM of STM32L1
Add eeprom to STM32L1 series.
Currently supported L1 series EEPROM size is 4Kbyte.

Signed-off-by: Kwon Tae-young <tykwon@m2i.co.kr>
2019-12-12 07:57:33 -06:00
Feng Cheng
ee57c8e749 drivers: flash: Add the flash driver of the stm32f1x family
Most of the code is copied from the stm32f0x family
Tested on stm32f103ze soc

Signed-off-by: Feng Cheng <i@fengch.me>
2019-12-11 12:40:33 -06:00
Ulf Magnusson
984bfae831 global: Remove leading/trailing blank lines in files
Remove leading/trailing blank lines in .c, .h, .py, .rst, .yml, and
.yaml files.

Will avoid failures with the new CI test in
https://github.com/zephyrproject-rtos/ci-tools/pull/112, though it only
checks changed files.

Move the 'target-notes' target in boards/xtensa/odroid_go/doc/index.rst
to get rid of the trailing blank line there. It was probably misplaced.

Signed-off-by: Ulf Magnusson <Ulf.Magnusson@nordicsemi.no>
2019-12-11 19:17:27 +01:00
Maureen Helm
30415e9246 dts: Add spi bindings and nodes for lpc socs
Adds spi device tree bindings and nodes for the lpc54xxx and lpc55s6x
socs in preparation for adding a new spi driver.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2019-12-10 08:48:56 -06:00
Carlo Caione
7baf3f74a9 interrupt_controller: gic: Support PPIs
The GIC-400 driver currently only supports SPIs because the (32) offset
for the INTIDs is hard-coded in the driver. At the driver level there is
no really difference between PPIs and SPIs so we can easily extend the
driver to support PPIs as well.

This is useful if we want to add support for the ARM Generic Timers that
use INTIDs in the PPI range.

SPI interrupts are in the range [0-987]. PPI interrupts are in the range
[0-15].

This commit adds interrupt 'type' cell to the GIC device tree binding
and changes the 'irq' cell to use interrupt type-specific index, rather
than a linear IRQ number.

The 'type'+'irq (index)' combo is automatically fixed up into a linear
IRQ number by the scripts/dts/gen_defines.py script.

Signed-off-by: Stephanos Ioannidis <root@stephanos.io>
Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2019-12-10 06:59:55 +01:00
Henrik Brix Andersen
94b509ba9f dts: bindings: nxp: lpi2c: add bus idle timeout property
Add property for specifying the bus idle timeout for the NXP
i.MX/Kinetis LPI2C I2C controller.

Enabling the bus idle timeout helps the controller to recover from
e.g. EMC causing false clock pulses/spikes on the SCL line.

Without a timeout the LPI2C controller will assume that another bus
master took over the I2C bus and thus refuses to issue a I2C START
condition.

Signed-off-by: Henrik Brix Andersen <hebad@vestas.com>
2019-12-09 16:01:38 -06:00
Evgeniy Didin
8922afb0f8 arc: hsdk: Set SRAM_BASE_ADDRESS in defconfig
On power-on boot-ROM is mapped to address 0 in HSDK board.
Normally later when U-Boot gets started by boot-ROM we change mappings
so that real DDR is mapped to entire address space including 0:
https://elixir.bootlin.com/u-boot/latest/source/board/synopsys/hsdk/hsdk.c#L474

But if U-Boot is not started (which is controlled by the BIM dip-switch
on the board) boot-ROM remains mapped to 0, and essentially any attempt
to write to that location fails, thus we cannot upload contents of our
target Elf there even with JTAG.

The next logical option is to use beginning of the non-translated
memory region 0x8000_0000 which we typically use for loading
U-Boot & Linux kernel on ARC boards. But in case of HSDK
we have DCCM (Data Closely-Coupled MEmory - fast on-chip SRAM)
mapped there and since we cannot execute code from DCCM
we need to skip that region as well which gives us the next option
being 0x9000_0000 . That's because DCCM owns entire 256 MiB "aperture"
even though it may have much smaller size up-to 8 MiB.

We are mapping only 5 apertures because the last two
(0xe000_0000-0xffff_ffff) are used for peripherals and AXI.

Signed-off-by: Evgeniy Didin <didin@synopsys.com>
Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
2019-12-09 16:37:12 -05:00