mdb binary starts several subproceses and one of them is cld process.
In runners/mdb.py we record process id of cld on each mdb launch
to terminate simulator correctly later. However we can finish test
and terminate mdb before the cld process was found (so cld won't
be terminated correctly by sanitycheck infrastructure). It may happen
if we launch mdb on fast host machine.
That leads to several issues. First of all we get ugly error in
sanitycheck output:
------------------------>8--------------------------------
FileNotFoundError: [Errno 2] No such file or directory: '/xxxx/mdb.pid'
------------------------>8--------------------------------
Secondly (and it's more important) we terminate simulator incorrectly.
We terminate mdb leaving cld process alive, running and consuming one
cpu core permanently (until we kill it manually)
So, let's increase granularity of lookups and don't wait extra 0.5
seconds before the first lookup.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Use common definitions of HAL_USED_PPI_CHANNELS and HAL_USED_PPI_GROUPS
macros that will provide (through z_bt_ctlr_used_nrf_ppi_* variables)
information about either PPI or DPPI (depending on the SoC) resources
used by the Bluetooth controller.
Update also the hal_nordic module revision, to make the related nrfx
allocator aware of those reserved DPPI resources.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Remove no longer needed definition of NRFX_PPI_CHANNELS_USED_BY_PWM_SW
(after recent changes in the nrf_hw_models models, also for simulated
nRF boards the nrfx_glue.h file is processed, so this symbol is always
defined).
Remove also a couple of *_PPI_x_INCLUDE macros, to make the code a bit
clearer and to avoid things like a build assertion (also removed here)
that checks if HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI_0_INCLUDE is indeed
defined as BIT(HAL_SW_SWITCH_GROUP_TASK_DISABLE_PPI(0)).
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
After the commit SHA1: 370d02743a the
alias for 'eth' was removed. As a result DT_ALIAS(eth) for the mcux
enet driver was not providing a valid DTS node reference.
As a result the 'fixed-link' child node property was not recognized at
all.
The 'enet' is a valid DTS label for mcux enet driver, so lets use it
instead.
Signed-off-by: Lukasz Majewski <lukma@denx.de>
Currently there is no maintainer and active collaborator in watchdog
subsystem area. I hope this helps to encourage Zephyr developments.
Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net>
Update description of macros to create commands with mandatory
number of parameters. Added information that the command name is also
included in this number.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
This sample application simulates a network router with several
interfaces which performs IP Header Validation(calculation
of CRC16 header checksum). Each interface is represented
by sender queue(initialized with packet headers) and receiver queue.
Every header first is fetched from sender queue, than the header
CRC16 is calculated, and finally if hashsum is correct
the header is stored in receiver queue.
Each interface is can be processed independently by multiple threads.
This application can be used for testing the correctness
of synchronization mechanisms on multi-core systems.
Signed-off-by: Evgeniy Didin <didin@synopsys.com>
USB MSC sample has been expanded over time. Config overlays
for RAM disk and flash disks were added. Board specific overlays
followed. It was overlooked that they forced a specific
configuration for the nrf52840dk_nrf52840 board,
even if it was not explicitly desired
(for example RAM-disk). This also caused strange behaviour
during automatic MSC USB3CV tests (which explicit selects RAM-disk)
so that nrf5340dk_nrf5340_cpuapp board passed test
but nrf52840dk_nrf52840 failed.
Rework disk and file system configuration, and initialization
code, allow to use FAT file system on top of RAM disk.
This sample can be built with none or one of two supported
file systems, LittleFS or FATFS. Disk subsystem can be flash
or RAM based. LittleFS only works with flash disk.
There are four useful possibilities:
- RAM disk without any file system for testing (default)
- RAM disk with FAT file system
- flash disk with FAT file system
- flash disk with LittleFS
Flash disk configurations is only available (as before) for
nordic,qspi-nor compatible, but only need the device tree overlay
per platform without a config overlay.
This path also revises test cases.
Remove invalid "flash" tag from depends_on key.
Remove unnecessary gpio tag and exclude native platform.
Resolves: #26275
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
For USB mass storage class, a fixed size 16 KiB FAT12 ramdisk
is forced. This is not really visible to the user and
the DISK_RAM_VOLUME_SIZE option is ignored.
There is no use of such a small file system and for USB MSC
testing, like throughput or USB3CV, a file system is not necessary.
Signed-off-by: Johann Fischer <johann.fischer@nordicsemi.no>
On Cortex M7, we need to check the optional presence of
Lock Access Register (LAR) which is indicated in
Lock Status Register (LSR).
When present, a special access token must be written to unlock DWT
registers.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
When testing the bmi160 I've come across an issue where the readings
didn't make sense to me. The issue comes from reading the
BMI160_SAMPLE_BURST_READ_ADDR which is 0x0C assuming both accelerometer
and gyroscope. At this point we would normally read 12 bytes
(2 bytes per sample * 3 axes * 2 sensors). This reading takes place in
bmi160_sample_fetch and begins writing to data->sample.raw
Without this change, the first byte written is actually to the dummy
byte which effectively gets tossed. The issue is that this is the
GYR_X<7:0>(LSB) according to the BMI160 data sheet. When we later call
either bmi160_gyr_channel_get or bmi160_acc_channel_get we're looking
at sample.gyr and sample.acc (which is effectively shiften by 1 byte).
This change gets rid of the dummy byte which re-alignes gyr with the
start of the raw buffer.
Signed-off-by: Yuval Peress <peress@chromium.org>
The exclusive bound for parameter headers needs to be incremented as
the nph parameter is not the number of parameter headers: 0 means one
header.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Adding support for Quectel BG95 Modem offloaded driver
to zephyr.
The driver currently implements only the
client side functions of the "socket_op_vtable", and
so cannot be used for cases where Zephyr acts as a
server. Moreover the driver only supports TCP for now.
Looking through the guides, the same driver should be
usable for BG96 (and other modems) except for the modem
boot-up sequence. Hence its named as "bg9x" instead of
"bg95".
Tested extensively with Zephyr acting as MQTT endpoint
and publishing / subscribing data to / from an MQTT
broker.
Signed-off-by: Bilal Wasim <bilalwasim676@gmail.com>
Add a new option that will enable treating RAM/SRAM overflows as errors
instead of skipping them, which is the default.
Fixes#27583
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
We were setting all devices as connected, now do that based on serial
availability.
Rename internal variables and make them shorter:
connected_hardware -> duts
ConnectedDevice = DUT
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
use a loop instead of all() to make the test easier to debug.
remove the default platform test, as this is now being filtered
differently in the code.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The available key is a runtime variable, it does not need to be in the
hardware map. Make it optional to keep the file format compatible for
now.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Try and keep terminilogy consistent, a test application with multiple
test cases is now a 'test suite'.
Also fix accounting when retrying failed.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
If we provide arch on command line, do not check for all platforms of
architectures not specified.
Fixes#30099
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Show in debug mode what files are being written. In some cases this
takes a while and it is good to see what is going on.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
With python threading we have multiple issues with performance and
leakage. Use the python Process and implement locking using
multiprocessing library. This change improves performance and fixes
various issues with logging, concurrency and reliability of the output.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Provide a helper to extract the devicetree node_id for a GPIO
controller from a gpio phandle array. This can be used with
DEVICE_DT_GET() to directly reference the corresponding controller
device.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
When using a devicetree node as an identifier we know the identifier
used to define the device structure. This allows code to directly
reference that structure, avoiding the need to look it up by label at
runtime.
Change the macros so DEVICE_DT_* device objects are globally visible
using the node identifier as the object identifier.
Also add the necessary API to verify that a device that was captured
at build time successfully completed initialization and any other
steps necessary before it can be safely used.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Use the clock devicetree node as the source of object name and other
information used when defining the device structure.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
For devices defined using devicetree nodes we need to pass the
devicetree node, and to infer names for the device and the driver from
it. Devices defined in the classical way don't need this. Introduce
another level of private abstraction that accepts the information from
either source, falling back to the old parameters when the provided
node is invalid.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
The dev_name is the canonical DT node identifier encoding the
devicetree path; the drv_name is the label of the corresponding node.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
Originally, sys_read8 to the mapped address was added part of
the unmap API to protect OMAP mapping, i.e. in case of PCIe writes,
OMAP should not be overwritten before writes are completed.
Now that we have added dummy PCIe read in the common APIs, namely
pcie_ep_xfer_data_memcpy and pcie_ep_xfer_data_dma, for the purpose
of flushing PCIe writes; the purpose of protecting OMAP *also*
gets satisfied, randering PCIe read in the unmap useless,
so remove the same.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Introduce common API to achieve data transfer using system DMA.
"System DMA" uses the outbound memory mapped Host address,
it cannot understand Host/PCIe address.
This API will take of mapping the Host address, completing
the data transfer to/from Host memory and unmapping the window;
thus providing abstraction to the user.
Since v1:
- refactored code for the cases where we have valid mapped_addr
to improve error management logic
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Once host memory is mapped to outbound memory, PL330 can be used to
transfer data between outbound memory and local memory.
Add API for the same, we get pl330 device as well as channels to be
used for tx/rx from DT and use DMA public APIs for data transfer.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
For a given PCIe EP device, data transfer to/from Host memory can be
achieved with "System DMA" between mapped Host memory
(PCIe outbound memory) and EP device's local memory if EP is equipped
with a "System DMA controller".
Add public API to enable such DMA transfers.
The term "System DMA" is used to clarify that we are not talking about
dedicated "PCIe DMA"; rather the one which does not understand PCIe
address directly, and uses the mapped Host memory.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add tx/rx pl330 channel IDs for the iProc PCIe client usage.
pl330 channel 0 is allocated for Tx DMA (Device to Host write) and
pl330 channel 1 is allocated for Rx DMA (Host to Device read).
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
