BOSSAC uses a bootloader, so pull the flash address from DeviceTree or
the config and use if the version of BOSSAC supports offsets.
Signed-off-by: Michael Hope <mlhx@google.com>
BOSSA 1.7 has built-in bootloader offset handling while 1.9.1
requires the user to supply the offset. Add support for both by
sniffing the help output and warn the user if the flags needs adding.
Related to #22062
Signed-off-by: Michael Hope <mlhx@google.com>
Some boards may include an APA102 LED on an existing SPI bus. With
additional circuitry, chip select is supported where the APA102
lacks a built in CS pin.
This patch allows CS to be defined in the devicetree (through .dts
files) and utilised in the apa102.c driver if it's available. Preserving
old behaviour if no chip select is defined.
Signed-off-by: Roman Vaughan <nzsmartie@gmail.com>
This commit makes it possible to use stm32flash for flashing (with west)
the STM32F030 Demo Board. OpenOCD is still the default, so in order to
use stm32flash, one must invoke ‘west flash’ with ‘-r stm32flash’.
Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Enable TCC0, define the PWM LED, document, and add to the peripheral
list.
Tested using samples/basic/fade_led/
Signed-off-by: Michael Hope <mlhx@google.com>
The common code now auto selects drivers. Update the Trinket to match
the Arduino Zero including trimming the defconfig and listing the
supported peripherals.
Signed-off-by: Michael Hope <mlhx@google.com>
Add a link to the page describing our development
processes, as it contains the description of how
to identify issues and pull requests as stale.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add a small section, clarifying the policies around modifying
contributions submitted by other developers.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Add a small paragraph in the Contribution Guidelines
documentation to stress that cherry-picking of patches
into other pull requests is an allowed practive. Add a
link to additional documentation clarifying policies
around modifying patches of other developers.
Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
Adds optional device tree properties to set delays between spi chip
select assert/deassert and clock edges in the mcux dspi and lpspi
drivers. If these properties are not set, then the minimum supported
delays are used.
Verified that tests/drivers/spi/spi_loopback/ still passes on
mimxrt1050_evk (lpspi driver) and frdm_k64f (dspi driver).
Measured with a scope that the pcs-sck-delay and sck-pcs-delay times on
the first spi transaction in the test are reduced from 7.82 us to 20 ns
on mimxrt1050_evk.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Select MPU_ALLOW_FLASH_WRITE when ARM_MPU is enabled, not CPU_HAS_MPU.
MPU_ALLOW_FLASH_WRITE is only defined as a symbol when ARM_MPU is
enabled. ARM_MPU is only defined when CPU_HAS_MPU is defined, so the
CPU_HAS_MPU dependency can be dropped.
This fixes a build error when MCUMGR_CMD_IMG_MGMT is enabled but
ARM_MPU is not.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add an additional option to the spi_cs_control struct that records how
the pin has been configured in devicetree. For drivers that are not
updated, the CS behaviour is the same as before (Push-Pull).
Use the devicetree knowledge with the GPIO subsystem so that the correct
physical pin levels for the CS pin are automatically selected.
Fixes#26267
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Add Nuvoton numicro series UART support, currently supports
only poll mode.
UART0 clock and pincontrol are directly configured, will be
replace when clock and gpio support is added.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
Add initial support for nuvoton numicro m48x SoC series, basic
init and uart functionality are covered with gpio and clock
directly relies on HAL.
Signed-off-by: Saravanan Sekar <saravanan@linumiz.com>
PCIe shell was enabled by default if shell is enabled in below commit:
commit ee985d81aa ("shell: enable modules by default if shell is
enabled").
However, this shell file has tests for PCIe RC, not applicable to EP.
So, should not be default enabled for PCIe EP.
If we add EP shell tests in future, they should be added under
drivers/pcie/endpoint/ directory.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Add devicetree overlay for connecting an Mikroe ADC click shield to an
NXP LPCXpresso55S16 development board.
The LPCXpresso55S16 uses SSEL1 (CS1) for mikroBUS SPI, whereas the
generic Mikroe ADC click board definition assumes SPI CS0.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
Use the recently introduced mikrobus_spi devicetree node as parent node
instead of relying on mapping for arduino_spi.
Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
The Seeeduino XIAO is a tiny (20 mm x 17.5 mm) ARM development
board with onboard LEDs, USB port, and range of I/O broken out
onto 14 pins.
Signed-off-by: Michael Hope <mlhx@google.com>
Fixes whitespace in the frdm_kw41z shield document to allow continuation
in the numbered list of Bluetooth controller instructions and to format
the jumper configuration sublist correctly.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
