This CL contains the drivers of NPCX Host Sub-Modules that serve as an
interface between the Host and Core domains. For most of them, the Host
can configure these modules via eSPI(Peripheral Channel)/LPC by
accessing 'Configuration and Control register Set' which IO base address
is 0x4E as default. And the interrupts in core domain help handling any
events from host side.
In this commit, we introduced six host sub-modules. It includes:
1. Keyboard and Mouse Controller (KBC) interface.
2. Power Management (PM) channels.
3. Shared Memory mechanism (SHM).
4. Core Access to Host Modules (C2H).
5. Mobile System Wake-Up functions (MSWC).
6. Serial Port (Legacy UART)
The tasks in application layer such as 8042, ACPI and host command can
cooperation with this driver by connecting api or callback functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.
Becisdes introducing eSPI device in npcx7, this CL also includes:
1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Fixed build error in in eSPI socketpair test suite since wrong function
name for eSPI flash channel api.
This CL also fixed [-Werror=unused-function] warning by adding inline
attribute in case someone includes "espi_utils.h" and doesn't call
espi_manage_callback() function.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The power draw of this magnetometer is significant,
device power management is needed for our use-cases.
Signed-off-by: Emil Hammarstrom <emil.hammarstrom@assaabloy.com>
Change-Id: I71158e629e93b491c6d673aa81001b7a7099f654
MWDT toolchain has Stackcheck_alloca option enabled by default.
So it adds stack checking in addition to Zephyr's stack checking.
As it is completely redundant let's drop it.
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Here, we include some addtional tests for durations that have
sub-microsecond components.
1ns => k_busy_wait(0). Round to 1us.
1us + 1ns => k_busy_wait(1us). Round to 2us.
1s + 1ns => k_busy_wait(1000000us). Round to 1000001us.
1s + 1us + 1ns => k_busy_wait(1000001us). Round to 1000002us.
Fixes#28483
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
We must round up to the nearest microsecond in order to fulfill the
nanosleep(2) API requirement of sleeping for *at least* that many
nanoseconds.
The only platform with an upper-bound check right now is Nordic.
Fixes#28483
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
EMSK boards can't be reset between tests due to hardware configures.
MPU v3 configs in previous test could cause exceptions in the following
tests. This commit fixes this issue by restoring MPU registers initial
states at early init stage.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
Previously MPU registers macros are only defined within its own header
files and could not be used by other part of program. This commit unify
them together.
Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
Generates a warning message when building with
CONFIG_TEST_RANDOM_GENERATOR. The purpose is inform that this is not
secure and should not used in production.
Signed-off-by: Flavio Ceolin <flavio.ceolin@intel.com>
The documentation of the callback implies it is invoked from a thread,
but the documentation of the stop function states it can be called
from interrupt context.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
API that takes k_timer structures but doesn't change data in them is
updated to const-qualify the underlying object, allowing information
to be retrieved from contexts where the containing object is
immutable.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
API that takes _timeout structures but doesn't change data in them is
updated to const-qualify the underlying object, allowing information
to be retrieved from contexts where the containing object is
immutable.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Right before #28631 was merged the writeoc/readoc settings were ignored,
so the flash was actually working in single line mode. In turns out that
quad mode can't be used with this flash without setting the QE bit in
the status register, so until this is supported fall back to dual mode.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
It's copy of openthread conf from samples/net/sockets/echo_client,
but requires increasing of main stack size to avoid crash.
Also fixes building if CONFIG_LWM2M_DTLS_SUPPORT is enabled #28787.
Signed-off-by: Kiril Petrov <retfie@gmail.com>
Both operands of an operator in the arithmetic conversions
performed shall have the same essential type category.
Changes are related to converting the integer constants to the
unsigned integer constants
Signed-off-by: Aastha Grover <aastha.grover@intel.com>
So far 'tests' and 'samples' directories were matched only when they
were first directories in path hierarchy. This doesn't work when running
sanitycheck from directory other than Zephyr source code root.
Match any directory in path hierarchy, similar how file is matched
currently. That way sanitycheck can be executed from outside of Zephyr
source code directory.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add '--coverage-basedir BASEDIR' argument, which can be used to specify
source code base directory other than default Zephyr root directory.
This is mainly useful for projects built on top of Zephyr, where
sanitycheck is used for unit testing application code.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Use italics more consistently when referring to parameters by name.
Make the ImportFlag members appear.
Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
The hardcoded APIC ID will be kept as default if the CPU is not found in
ACPI MADT.
Note that ACPI may expose more "CPUs" than there actually are
physically. Thus, make the logic aware of this possibility by checking
the enabled flas. (Non-enabled CPU are ignored).
This fixes up_squared board made of Celeron CPU.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
No need to mix super short version of names with other structures
having full name. Let's follow a more relevant naming where each and
every attribute name is self-documenting then. (such as s/id/apic_id
etc...)
Also make CONFIG_ACPI usable through IS_ENABLED by enclosing exposed
functions with ifdef CONFIG_ACPI.
Signed-off-by: Tomasz Bursztyka <tomasz.bursztyka@linux.intel.com>
The scan callbacks may be NULL, which would cause an error if
e.g. the timeout callback wasn't set and the scan terminates after
a timeout.
Signed-off-by: Emil Gydesen <emil.gydesen@nordicsemi.no>
The generic kernel API did not specify the effect of the call on the
interrupt lockout state. The implementation forwards to
arch_cpu_atomic_idle() which does document that the state is restored
to the state specified in the passed key, which makes it have the
effect of invoking irq_unlock(key).
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
On stm32f1 series, device pinctrl configuration could be modified
thanks to remapping capability.
Remapping allows to provide alternate pinctrl configuration to a
peripheral device and applies to all impacted pins.
So, specifically for stm32f1 series, apply remapping when required
before proceeding with pin configuration.
Additionally, because remapping is defined individually for each pin,
apply a function on pinctrl configuration to check remapping setting
coherency accorss pins.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Based on pinmux data encoded in dt bindings some stm32f1 post
processing is required to eventually fit into data structures
expected in gpio_stm32_configure function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
stm32f1 series pin controller IP is not compatible with other stm32
series.
Set the dedicated st,stm32f1-pinctrl compatible for pinctrl node.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provide yaml bindings for st,stm32f1-pinctrl copmpatible.
It differs from generic stm32 pinctrl bindings on the following points:
- Pinmux "function" parameter: Alternate, General output, Input, Analog
- Pinmux supports an additional "remap" parameter to encode potential
remapping configuration
- Bias configs only apply to input modes
- Drive and speed configs only apply to output modes
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
On stm32f1 series, in output mode, there is no way to enable
pull-up/down resistors.
Clean these settings from helper defines.
Additionally add helper define to shorten few lines.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Macro STM32_PINMUX and related definitions are not compatible with
stm32f1 series and then should not be provided in -common.h.
Move them to stm32-pinctrl.h
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provides tool set to be used by device drivers in order to be able
to configure device signals.
This does not involve the implementation of a dedicated pinctrl
driver. In this regard, this is equivalent to implementation used
for treatment of current pinmux.c files.
Since STM32F1 uses a different GPIO configuration scheme, its
support is exlcuded for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
