Commit Graph

4266 Commits

Author SHA1 Message Date
Rubin Gerritsen
f93559c87b nrf52_bsim: Fix cmsis irq locking logical bug
True means IRQs are disabled.

Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
2020-11-11 13:24:47 +01:00
Yuguo Zou
ba2413f544 arch: arc: change to CONFIG_INIT_ARCH_HW_AT_BOOT
align kconfig option CONFIG_ARC_CUSTOM_INIT to
CONFIG_INIT_ARCH_HW_AT_BOOT. Remove unused CONFIG_ARC_CUSTOM_INIT in
kconfig.

Signed-off-by: Yuguo Zou <yuguo.zou@synopsys.com>
2020-11-11 13:20:14 +01:00
Gerard Marull-Paretas
d79b003758 boards: shields: add support for buydisplay 3.5" TFT
Add support for the BuyDisplay 3.5" TFT + touch shield based on ILI9488
controller and FT6236 touch.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-10 15:52:12 -06:00
Gerard Marull-Paretas
acb0cd65ca drivers: display: ili9xxx: generalize ILI display driver
Make driver generic for multiple ILI displays. The adopted strategy is
to share all driver code except register initialization, which has been
found to have some specific registers/values depending on the
controller.

The driver has been adjusted to support multiple compatibles.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-10 15:52:12 -06:00
Eugeniy Paltsev
499b4c9069 ARC: nSIM: DTS: switch UART clock-frequency to 50MHz
UART IP is clocked with 50MHz on HAPS by default. So switch
UART clock-frequency from 100MHz to 50MHz for nsim_* boards
so the binaries can be run on HAPS as well.

This property is dummy in case run in simulator (nSIM) so we
don't need to change anything in nSIM configuration files.

Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
2020-11-10 14:02:11 -06:00
Andrzej Głąbek
6207300dc3 boards: nrf5340dk_nrf5340: Add dts node for MX25R64 flash on QSPI
The nRF5340 (P)DK is equipped with the MX25R64 flash memory. Add a dts
node for that chip in the board definition as well as the missing QSPI
node in the nRF5340 SoC definition.

Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
2020-11-10 21:01:37 +02:00
Ioannis Glaropoulos
083e272eb5 boards: arm: nrf340: update board image in docs
Update the board image file in the nrf5340 documentation,
reflecting the fact that we now document the nRF5340 DK
instead of the PDK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-10 17:49:20 +01:00
Ioannis Glaropoulos
d58fa250ed boards: arm: update nRF5340 documentation to point to the nRF5340 DK
Update the docs of nRF5340 board, to point to the
nRF5340 DK instead of the PDK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-10 17:49:20 +01:00
Kumar Gala
5e97d779bb device: convert DEVICE_INIT to DEVICE_DEFINE or SYS_DEVICE_DEFINE
Convert handful of users of DEVICE_INIT to DEVICE_DEFINE or
SYS_DEVICE_DEFINE to allow deprecation of DEVICE_INIT.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-11-10 08:38:09 -06:00
Gerard Marull-Paretas
394c7d0bef boards: arm: update pwm signals on all STM32 based boards
Update PWM pinctrl signal names of all non-F1 STM32 boards.
`pwm` variant is not available anymore on non-F1 series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-09 16:04:24 -06:00
Alexandre Mergnat
e76b8e427d boards: hifive1_revb: add support for memory protection features
Add this board to E31 core family.

Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com>
2020-11-09 15:37:11 -05:00
Henrik Brix Andersen
4f8563364e boards: shields: ssd1306_128x64_spi: fix GPIO usage
Move the data/command GPIO from Arduino header 16 (D10), which collides
with Arduino SPI SS, to Arduino header 15 (D9).

Add commented example for specifying a reset GPIO on Arduino header 14
(D8).

Signed-off-by: Henrik Brix Andersen <henrik@brixandersen.dk>
2020-11-09 09:51:19 -06:00
Ioannis Glaropoulos
c3ac3027a1 boards: arm: mark nRF5340 PDK as deprecated.
We deprecate nRF5340 PDK and add a note that
the board will be replaced by nRF5340 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-09 17:33:54 +02:00
Ioannis Glaropoulos
9a51c01559 boards: arm: nrf: remove note about board name change
Nordic Dev Kit board names were changed in Zephyr
v2.3 release, following the standard Board deprecation
policy. Two releases later we do not need to keep
references to the old names in the boards' documentation.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-11-09 17:04:22 +02:00
Alexander Kozhinov
7b3071a57d boards: arm: nucleo_h745zi_q: doc
add new modules description documentation

Signed-off-by: Alexander Kozhinov <AlexanderKozhinov@yandex.com>
2020-11-05 10:09:42 -06:00
Andrew Boie
4c87224818 x86: add qemu_x86_tiny
This build target has all the low-memory options enabled for
memory management: a 4MB address space, 32-bit paging mode,
no KPTI, an empty page pool, and common page tables for
memory domains.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-11-05 09:33:40 -05:00
Andrew Boie
0dae74e4a5 boards: x86: tune X86_MMU_PAGE_POOL_PAGES
These are set such that we have enough pages in the pool
for typical driver mappings and to instantiate two more
memory domains, which is what our tests require.

Signed-off-by: Andrew Boie <andrew.p.boie@intel.com>
2020-11-05 09:33:40 -05:00
Lauren Murphy
39523f45c5 boards: Add qemu_x86_64_nokpti target
Adds a build target to run tests on qemu_x86_64 with KPTI disabled.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2020-11-05 09:33:40 -05:00
Lauren Murphy
67395d6f07 boards: Add qemu_x86_nokpti target
Adds a build target to run tests on qemu_x86 with KPTI disabled.

Signed-off-by: Lauren Murphy <lauren.murphy@intel.com>
2020-11-05 09:33:40 -05:00
Jeremy LOCHE
d943d146c9 boards: nucleo_h743zi: enable ethernet support
Since STM32H7 series now have a working ethernet driver,
nucleo_h743zi ethernet can be enabled.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-11-05 08:30:06 -06:00
Trond Einar Snekvik
86c793af3f sys: util: Replace MIN(MAX(a, b), c) with CLAMP
Replaces all existing variants of value clamping with the MIN and MAX
macros with the CLAMP macro.

Signed-off-by: Trond Einar Snekvik <Trond.Einar.Snekvik@nordicsemi.no>
2020-11-05 12:12:17 +01:00
Gerard Marull-Paretas
ddd0a97206 boards: arm: nucleo_h743zi: add support for stm32cubeprogrammer runner
Add support for the recently introduced STM32CubeProgrammer runner.
Updated documentation to mention its availability as latest official
OpenOCD releases do not support H7 series.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-04 14:47:35 -06:00
Gerard Marull-Paretas
f98dd24993 runners: add support for stm32cubeprogrammer
Add support for the official ST Microelectronics programming tool (CLI
version).

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-11-04 14:47:35 -06:00
Erwan Gouriou
afd899ee6f boards: nucleo_g4*: Remove USB support
There is no user USB port available on these boards.
Remove support and remove files when no more needed.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-04 12:21:30 -06:00
Maureen Helm
1cf89dcdfb boards: samples: Enable fat_fs sdhc sample on mm_swiftio board
Enables the fat_fs sample on the mm_swiftio board by adding a
board-specific Kconfig overlay, and adding sdhc to the list of
board-supported features.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-11-03 10:35:49 -06:00
Erwan Gouriou
bf62ef172e boards: stm32: Remove pinmux.c files
Following migration of pinctrl configuration from pinmux.c files
to device tree and deprecation of pinctrl defines, remove
pinmux.c files when possible.
Additionally remove the CMakeLists.txt files when it makes sense.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-03 11:11:04 +01:00
Gerson Fernando Budke
76215339c2 boards: shields: Introduce inventek es-WIFI shield
Add Inventek es-WIFI modules shield.  This shield exposes es-WIFI driver
using Arduino Uno R3 header by UART or SPI interfaces.  It shows how
user can create their own overlay and expose es-WIFI driver.

The current Inventek's EVB doesn't have all pins necessary to control
the module by Arduino hearder.  This shows how to wire to get ISM43xx
EVB working.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-11-03 11:05:43 +01:00
Scott Worley
177ea9316c boards: mec: mec15xxevb, mec1501modular: Update documentation
Update documention to refer to MEC152x specifications and
SPI image generator. MEC152x is the actual production SOC.
The only difference is the Boot-ROM loader SPI image layout.
Preserve the link to the old, MEC1501 SPI image generator.

Signed-off-by: Scott Worley <scott.worley@microchip.com>
2020-11-02 18:44:36 -05:00
Anas Nashif
3219710c34 boards: qemu_x86: enable llvm toolchain
Make this board buildable with llvm.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-11-02 14:30:37 -05:00
Ryan Holleran
807d8aa87b boards: frdm_k22f: Correct FXOS8700 i2c address
The address in NXP's documentation shows that 0x1c is the addressfor the
FXOS8700.

Signed-off-by: Ryan Holleran <rhollerar@gmail.com>
2020-11-02 10:29:41 -06:00
Erwan Gouriou
199cf5668b boards: stm32: Move USB pins to device tree configuration
Move STM32 based board USB pin configuration to device tree.

Exceptions:
* olimex_stm32_h407: Node not enabled and not documented.
Signal added in disabled node.
* L0/G4 based boards as signals are not available yet.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-11-02 09:17:09 -06:00
Gerard Marull-Paretas
fc9f9059b5 boards: arm: move ethernet pinmux to DT pinctrl on all STM32 boards
Move Ethernet pinmux settings to DT pinctrl on all boards based on
STM32.

Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
2020-10-30 15:54:13 +01:00
Andy Ross
35ca8c97ce boards/qemu_cortex_r5: Adjust clock rates
This qemu device is REALLY slow in icount mode.  When I run it outside
of icount and watch the simulator advance the clock device in real
time, it looks to me like it expects the counter to be running at ~125
MHz.  But it's set to a 12 MHz clock rate in its config, and trying to
use a 1000 Hz tick rate.

At those settings (and with the shift=3 argument to icount), I'm
measuring about 10k cycles to handle a minimal timer interrupt.  But
if you do the math, that comes to 12k cycles per tick.  The interrupt
takes as long as a tick!  That would never work, except for the fact
that the timer driver on this device cheats and doesn't try to align
to ticks (basically ignoring all the lost time).  And even that breaks
on the scheduler_api test (which does both tick and cycle math and
tries to compare them) when it's fixed to properly align itself.

One solution might be to set the clock rate to what qemu appears to
believe is the correct 125 MHz value.  And that causes the test to
complete, but all tests now take ~10 minutes of real time because the
simulator is so slow!

So just make up some clock rates, it's a simulated platform after all.
I chose 5 MHz cycle time and 100 Hz tick rate, which on my device is
about half of "real" speed and very acceptable.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-29 07:39:39 -04:00
Erwan Gouriou
007677e676 boards: stm32: Move SDMMC pin configuration to device tree
Update boards supporting SDMMC to use dts based pinctrl config.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-29 09:21:27 +01:00
Maureen Helm
2edfb89db8 boards: arm: Use DT_SIZE macros for nxp external memories
Refactors nxp i.mx, kinetis, and lpc board-level device trees to use
DT_SIZE_K and DT_SIZE_M macros to define external memory sizes. This is
self documenting and easier to read.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-28 11:13:07 -05:00
Erwan Gouriou
74b0b41167 boards: stm32: Convert I2S users to dt based pinctrl config
I2S signals should now be configured using dt.

For nucleo_f411re, I2S pins were configured using SPI definitions
that pulled the same strings behind the scene as I2S would have done.
This being said, only CK and SD pins should be needed and were
documented, so I only left those.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-28 09:29:56 -05:00
Peter A. Bigot
c2bac29697 boards: thingy52_nrf52832: add nodes for on-board voltage regulators
This board has a multi-level power domain hierarchy where a sensor has
its own power control that is accessed through an external GPIO
peripheral that itself has a power control.

Signed-off-by: Peter A. Bigot <pab@pabigot.com>
2020-10-28 15:22:53 +01:00
Ioannis Glaropoulos
792bec2be8 boards: arm: remove non-existing doc link from partition definitions
In the flash partition definitions for ARM boards,
the link to the legacy partition macros does not
exist any more. The commit cleans up the partition
definition by removing this link.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-27 15:01:19 -04:00
Anas Nashif
3ac163eae6 boards: rename up_squared_adsp intel_adsp_cavs15
The Audio DSP is not specific to up_squared, so make it more generic.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-23 12:56:03 +02:00
Crist Xu
237b34ef2d watchdog: Add watchdog driver
Add watchdog driver for the RT1050/60

Signed-off-by: Crist Xu <crist.xu@nxp.com>
2020-10-23 12:52:13 +02:00
Erwan Gouriou
68e071ae81 boards: Move USB pin configuration to device tree for 2 STM32 boards
As a proof of concept, turn USB signals configuration to USB
for nucleo_wb5rg and disco_l475_iot1 boards.

This implicitly remove pull-up on _ID pin, which turn out to
have no side effect.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-22 10:34:14 -05:00
Maureen Helm
588890faf9 boards: soc: arm: Set zephyr,dtcm chosen node for i.mx rt boards
Sets the device tree chosen node for data tightly coupled memory (DTCM)
on i.mx rt boards that aren't already using DTCM as the chosen SRAM.
Leverages the common cortex-m linker section instead of the soc-specific
one.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-22 09:32:11 -05:00
Maureen Helm
07976026a2 boards: soc: arm: Set zephyr,sram chosen node for i.mx rt boards
Removes the DATA_LOCATION Kconfig symbol from the i.mx rt soc series and
refactors corresponding boards to use a device tree chosen node instead.
The external SDRAM is chosen on all boards that can support it;
otherwise the internal DTCM is chosen.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-22 09:32:11 -05:00
Gerson Fernando Budke
4042150876 boards: arm: Add PSoC-62 BLE Pioneer Kit
Introduce PSoC-62 BLE Pioneer Kit.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-22 08:18:27 -05:00
Abhishek Shah
8d226c595d drivers: pcie_ep: iproc: shorten file names
File names such as pcie_ep_bcm_iproc.c / pcie_ep_bcm_iproc_regs.h
seem unnecessarily long, same with CONFIG symbols' names.
Let's shorten them by replacing 'bcm_iproc' with simply 'iproc'.

Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
2020-10-22 11:07:39 +02:00
Kumar Gala
2a4d3bb6f2 dts: Fix altera vendor prefix
There are a few cases in which "altera" was used instead of "altr" as
the vendor prefix.  Update DTS and bindings in those cases to use "altr"

Fixes #29373

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-21 12:48:34 -04:00
Peter Bigot
61eee6d4fc boards: nrf52840dk_nrf52840: document suppported QSPI opcodes
The SPI NOR device on this board supports fastread, 2READ, DREAD,
4READ, and QREAD for read opcodes, but only PP and QPP for write
opcodes.  Provide a clue to people trying to use 2READ with 2PP: it
won't work.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-10-21 17:53:51 +02:00
Stephane D'Alu
9ee2aff917 nrf52840_mdk: support qspi flash
Added support for installed MX25R64 QSPI NOR flash.

Signed-off-by: Stephane D'Alu <sdalu@sdalu.com>
2020-10-21 17:34:26 +02:00
Stephane D'Alu
0d1497948d boards: Added cmsis-dap interface to openocd runner for NRF5
Added openocd runner with cmsis-dap interface.
Apply to nrf52840_mdk board.

Signed-off-by: Stephane D'Alu <sdalu@sdalu.com>
2020-10-21 17:33:48 +02:00
Stephane D'Alu
1ede694fc0 decawave_dwm1001_dev: use of openocd-nrf5.cmake
Using flash support provided by openocd-nrf5.

Signed-off-by: Stephane D'Alu <sdalu@sdalu.com>
2020-10-21 17:20:18 +02:00