Commit Graph

4266 Commits

Author SHA1 Message Date
Kumar Gala
b6b7e4c770 arm: v2m_musca: Mark Musca-A board support deprecated for 2.6.0
Deprecate the Musca-A board and SoC support to be removed in 2.6.0.
There are a number of issues with the Musca-A and there exists both the
Musca-B and Musca-S1.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-21 07:23:22 -05:00
Alex Tsamakos
42a0130699 boards: arm: actinius_icarus: fix partition sizes for SPU compatibility
This updates the flash partitions to comply with the Nordic SPU,
as discussed in #28505.

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
4d311d2199 boards: arm: actinius_icarus: turn on hardware stack protection
This enables the hardware stack protection by default
for the actinius_icarus board

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
e04831b29d boards: arm: actinius_icarus: add docs portal link, image, description
Minor touch-up to add a board image, updated description
and docs link

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
707d4f6d54 boards: arm: actinius_icarus: add lis2dh12 compatibility in DTS
This adds compatibility with "lis2dh12" on top of "lis2dh" in
the DTS

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
0486edaa9c boards: arm: actinius_icarus: update supported board capabilities
Updates the "supported" section to add capabilities that were
previously missing from the list

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
e9981e889a boards: arm: actinius_icarus: add feather and arduino related aliases
Adds serial, i2c, spi and gpio header aliases for compatibility
with arduino/feather shields

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
5538a5c974 boards: arm: actinius_icarus: add vbatt node in DTS
This adds compatibility with the sample in boards/nrf/battery

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Alex Tsamakos
da17aca73e boards: arm: actinius_icarus: update RAM partitions in DTS
Add chosen nodes for secure and non-secure RAM partitions
and update the common DTS to have a reserved-memory
node with all reserved RAM partitions

Signed-off-by: Alex Tsamakos <alex@actinius.com>
2020-10-21 07:13:49 -05:00
Jacek Ozimek
8ffbf01957 boards: adafruit_feather_m0_basic_proto: Add I2C support.
I2C support was tested with the bme280 sample.

Signed-off-by: Jacek Ozimek <jacek.ozmk@gmail.com>
2020-10-21 06:46:52 -05:00
Erwan Gouriou
206c19ec28 boards: nucleo_f103rb: Add arduino I2C
I2C1 pin configuration requires to enable remap on I2C1 pins.
Now this is transparent, it could be done easily, so enable
and configure pins for I2C1 on this board to enable arduino I2C.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-21 06:43:42 -05:00
Mulin Chao
173704859a dts: npcx7: rename pinctrl property to pinctrl-0
rename 'pinctrl' property to 'pinctrl-0' in device-tree files

Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
2020-10-21 06:33:20 -05:00
Erwan Gouriou
0edf368baa boards: stm32: Move STM32 boards SPI pin configuration to device tree
Move SPI pin configuration to device tree for all STM32 based
boards.
This should not bring any change in pin configuration.

Though, some adjuments have been made on following boards for
coherency:

* b_l4s5i_iot01a1: Removed "very-high-speed" on SPI3 MOSI pin.
Tested with no impact.
* black_f407zg_pro: SPI1 pins configured but not SPI1 node.
Removed pin config as not documented neither.
* sensortile_box: SPI2 pins configured but not SPI2 node.
Removed pin config as not documented neither.
* nucleo_g431rb/nucleo_g474re/nucleo_l476rg/nucleo_l4r5zi:
SPI2 and SPI3 pins were configured but missing.
Added since they were documented.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-21 06:29:48 -05:00
Mahesh Mahadevan
256ad8ab2d boards: LPC55S69: Add DMA support for HS_SPI device
-Add DMA channel details for the SPI DMA transfer
-Reserve HEAP_SPACE for DMA channel descriptors

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-21 06:26:40 -05:00
Mahesh Mahadevan
bd4f28179f boards: Update MIMXRT685 to pass SPI DMA channel number
The DMA TX and RX channel numbers are used when
CONFIG_SPI_MCUX_FLEXCOMM_DMA is enabled

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-21 06:26:40 -05:00
Maximilian Bachmann
583af994d0 boards: x86: disable werror for grub build
There is a warning because of some pointer arithmetics in Grub,
that makes the build fail. The build works after disabling -Werror.

Signed-off-by: Maximilian Bachmann <m.bachmann@acontis.com>
2020-10-21 06:19:51 -05:00
Anas Nashif
369ee655bf up_squared_adsp: disable bin creation on up_squared_adsp
Do not create bin file and remove all clutter. In this case we are
generating 1GB of data that will not be used.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
a8d5437799 soc/xtensa: Misc. checkpatch fixups
Code style fixes.  Kept separate from the original changes to permit
easier rebasing.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
a3848cb861 soc/xtensa/intel_adsp: Add arch_printk_char_out hook
Add a printk default hook that works in very early boot and doesn't
depend on the logging subsystem (which can still be used if desired,
of course).  It speaks the same protocol, is somewhat smaller (MUCH
smaller if the app doesn't otherwise need the logging and ring buffer
dependencies), and more efficiently uses the output slot space by
doing line buffering and flushing only when needed.

Most importantly this one is MP-safe via both locking and cache
coherence management, and can work reliably when SMP is enabled.
(Note that "reliable" means that all output appears without corruption
-- simulateous logging by two CPUs can still interleave bytes, of
course).

Longer term, if we keep this protocol it would be good to unify the
two backends to reduce duplicated code.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
2020-10-21 06:38:53 -04:00
Andy Ross
544a38ee62 soc/xtensa/intel_adsp: Upstream updates
Significant rework of the Intel Audio DSP SoC/board layers.  Includes
code from the following upstream commits:

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 25 16:34:36 2020 +0100

    xtesna: adsp: use 50k ticks per sec for audio

    Audio needs high resolution scheduling so schedule to nearest 20uS.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 24 13:59:01 2020 -0700

    soc/xtensa/intel_adsp: Remove sof-config.h includes

    This header isn't used any more, and in any case shouldn't be included
    by SoC-layer Zephyr headers that need to be able to build without SOF.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat Jun 20 15:42:58 2020 -0700

    soc/intel_adsp: Leave interrupts disabled at MP startup

    This had some code that was pasted in from esp32 that was inexplicably
    enabling interrupts when starting an auxiliary CPU.  The original
    intent was that the resulting key would be passed down to the OS, but
    that's a legacy SMP mechanism and unused.  What it actually did was
    SET the resulting value in PS.INTLEVEL, enabling interrupts globally
    before the CPU is ready to handle them.

    Just remove.  The system doesn't need to enable interrupts until the
    entrance to the first user thread on this CPU, which will do it
    automatically as part of the context switch.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 13:57:54 2020 +0300

    dts: intel_cavs: Add required label

    Add required label fixing build for CAVS15, 20, 25.
    Fixes following errors:
    ...
    devicetree error: 'label' is marked as required in 'properties:' in
    bindings/interrupt-controller/intel,cavs-intc.yaml,
    but does not appear in
    ...

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:19:56 2020 +0300

    soc: cavs_v18: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 15:12:25 2020 +0300

    soc: cavs_v20: Remove dts_fixup and fix build

    Remove unused now dts_fixup.h and fix build with the recent code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 23 14:59:23 2020 +0300

    soc: cavs_v25: Remove dts_fixup fix build

    Remove unused now dts_fixup and fix build with the latest code base.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:29:06 2020 +0300

    soc: intel_adsp: Remove unused functions

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:53:58 2020 +0300

    soc: intel_adsp: Clean up soc.h

    Remove unused or duplicated definitions.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 17:02:23 2020 +0300

    soc: intel_adsp: De-duplicate soc.h

    Move soc.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:54:19 2020 +0300

    soc: intel_adsp: Remove duplicated io.h

    Move duplicated io.h to common SOC area.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:46 2020 +0300

    cmake: Correct SOC_SERIES name for byt and bdw

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 12 12:39:02 2020 +0300

    soc: intel_adsp: Build bootloader only for specific SOCs

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Thu Jun 11 13:46:25 2020 +0100

    boards: xtensa: adsp: add byt and bdw boards WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 10 10:01:29 2020 -0700

    soc/intel_adsp: Make the HDA timer the default always

    The CAVS_TIMER was originally written because the CCOUNT values are
    skewed between SMP CPUs, so it's the default when SMP=y.  But really
    it should be the default always, the 19.2 MHz timer is plenty fast
    enough to be the Zephyr cycle timer, and it's rate is synchronized
    across the whole system (including the host CPU), making it a better
    choice for timing-sensitive applications.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:21:43 2020 +0300

    soc: cavs_v25: Enable general samples build

    Enables general samples build for SOC cavs_v25.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 15:13:53 2020 +0300

    soc: cavs_v20: Enable general samples build

    Enable general sample build.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:35:13 2020 +0300

    soc: cavs_v18: Fix build general samples

    Fix building general samples for CAVS18.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 14:22:40 2020 +0300

    soc: intel_adsp: Add support for other SOCs

    Support other SOCs in the "ready" message to the Host.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 10 13:25:39 2020 +0300

    soc: intel_adsp: Move adsp.c to common SOC area

    Move adsp.c to common and clean makefiles.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 17:18:18 2020 +0300

    boards: intel_adsp: Remove dependency on SOF

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 14:29:44 2020 +0100

    soc: xtensa: cavs: build now good for cavs20 + 25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 15:57:01 2020 +0300

    soc: cavs_v15: Fix build for hello_world

    Fix build for other then audio/sof targets.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:50:12 2020 +0300

    sample: audio/sof: Remove old overlays

    Removing old overlays used to switch logging backend.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 15:02:01 2020 +0300

    soc: intel_adsp: Correct TEXT area

    Correct HEADER_SPACE and put TEXT to:
    (HP_SRAM_WIN0_BASE +  HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE)

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:44:47 2020 +0300

    soc: intel_adsp: Trivial syntax cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 14:41:07 2020 +0300

    soc: intel_adsp: Fix bootloader script path

    Make it possible to find linker script if build is done not inside
    ZEPHYR_BASE.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 12:10:17 2020 +0100

    soc: xtensa: cavs20/25: fix build with new headers - WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 9 13:35:38 2020 +0300

    soc: intel_adsp: Fix include headers

    Fixes include headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 9 10:38:50 2020 +0100

    soc: xtensa: cav18: updated headers- WIP

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Fri May 1 15:29:26 2020 -0700

    soc/xtensa/intel_adsp: Clean up MP config logic

    CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs
    for which the Zephyr image is built.  This is the value kernel and
    device code should use to predicate questions like "is there more than
    one CPU?"

    CONFIG_SMP is an application tunable, controlling whether or not the
    kernel schedules threads on CPUs other than the first one.  This is
    orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a
    uniprocessor system or have a UP kernel on a MP system if the other
    cores are used for non-thread application code.

    CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel
    whether or not it can synchronously signal other CPUs of scheduler
    state changes.  It should be inspected only inside the scheduler (or
    other code that uses the API).  This should be selected in kconfig by
    soc layer code, or by a driver that implements the feature.

    CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this
    platform.  This is what we should use as a predicate if we have
    dependence on the IPM driver for a platform feature.

    These were all being sort of borged together in code.  Split them up
    correctly, allowing the platform MP layer to be unit tested in the
    absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one
    CPU (which is pathlogical in practice, but also a very good unit test)
    to be built.

    Also removes some dead linker code for SMP-related sections that don't
    exist in Zephyr.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:41:55 2020 +0100

    soc: xtensa: bootloader - use linker script

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Jun 8 16:26:18 2020 +0100

    soc: xtensa: further fix headers - WIP

    Simplify the directory structure, WIP for cavs20 and cavs25

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Jun 8 12:59:30 2020 +0300

    soc: cavs_v15: Remove unneeded include

    Remove include fixing build.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Jun 7 12:37:35 2020 +0100

    soc:xtensa: adsp: remove sof specific code from soc headers

    TODO: v1.8+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 23:19:37 2020 -0700

    intel_adsp_*/doc: fix duplicate .rst labels

    Quick fix purely to make the build green again.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Thu Jun 4 22:34:40 2020 -0700

    samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig

    This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that
    copied it here instead.

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri Jun 5 12:34:48 2020 +0300

    soc: intel_adsp: Move soc_mp to common

    Moving soc_mp to common SOC area, it still needs fixes for taking
    number of cores from Zephyr Kconfig, etc.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 16:05:06 2020 +0300

    soc: intel_adsp: Move memory.h from lib/

    For those files from SOF referencing platform/lib/memory.h we have
    include.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 15:20:09 2020 +0300

    soc: intel_adsp: Rename platform.h to soc.h

    Rename to prevent including it from SOF.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:47:55 2020 +0300

    soc: intel_adsp: Move headers

    Move headers to more convenient place

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Jun 4 11:21:51 2020 +0300

    soc: intel_adsp: More SOC cleaning

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Marc Herbert <marc.herbert@intel.com>
 Date:   Mon Jun 1 15:31:34 2020 -0700

    samples/audio/sof: import sof/src/arch/xtensa/  apollolake_defconfig

    Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig
    into prj.conf and new boards/up_squared_adsp.conf

    Signed-off-by: Marc Herbert <marc.herbert@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:07:40 2020 +0100

    soc:xtensa: adsp: let SOF configure the DSP for audio

    Let SOF do this for the moment.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 15:06:20 2020 +0100

    soc: xtensa: cavs: remove headers similar to cavs15

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 15:58:38 2020 +0300

    soc: intel_adsp: Move ipc header to common

    Remove duplicated headers from CAVS to common SOC part

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Jun 3 13:02:09 2020 +0300

    soc: cavs_v15: Remove unneeded headers

    Remove also from CAVS15.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 18:34:11 2020 +0300

    Remove more headers

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:12:09 2020 +0100

    soc: xtensa: remove cavs sod headers for drivers and trace.

    Duplicate cavs15 headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Jun 3 14:05:12 2020 +0100

    samples: move sof dai, dma and clk configs to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 17:38:45 2020 +0300

    soc: intel_adsp: Remove more duplicated headers

    Remove more headers

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue Jun 2 15:50:03 2020 +0100

    samples: sof: remove pm realted files.

    Use the SOF versions.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 16:55:40 2020 +0300

    WIP: Strip lib from include path

    WIP, pushed for sync

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:44:33 2020 +0300

    soc: intel_adsp: Remove more headers

    Remove even more common headers

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Jun 2 14:00:47 2020 +0300

    soc: intel_adsp: Remove SOF headers

    The headers would be used by audio/sof app directly from SOF module.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Sat May 30 11:01:26 2020 -0700

    soc/intel_adsp: Alternative log reading script

    This script speaks the same protocol and works with the same firmware,
    but:

    * Is a single file with no dependencies outside the python3 standard
      library and can be run out-of-tree (i.e. with setups where the
      firmware is not built on the device under test)

    * Operates in "tail" mode, where it will continue polling for more
      output, making it easier to watch a running process and acting more
      like a conventional console device.

    * Has no dependence on the diag_driver kernel module (it reads the DSP
      SRAM memory directly from the BAR mapping in the PCI device)

    * Is MUCH smaller than the existing tool.

    Signed-off-by: Andy Ross <andrew.j.ross@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 28 16:17:51 2020 +0300

    Decrease HEP pool size to 192000

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:27:00 2020 +0100

    soc: xtensa: cavs25: complete support for cavs25

    Builds, not tested on qmeu due to missing SOF ROM (TODO)

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:24:26 2020 +0100

    soc: xtensa: cavs20: complete cavs20 support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:22:13 2020 +0100

    soc: xtensa: cavs18: complete boot support

    Now boots on qemu.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:19:23 2020 +0100

    soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 29 10:16:06 2020 +0100

    TODO: samples: sof: work  around missing trace symbols.

    Disable local trace.
    Needs trace updates finished before this can be removed.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:57:19 2020 +0100

    dts: xtensa: rename apl to cavs15 DTS

    This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:52:20 2020 +0100

    west: commands: sign: Add signing support for other CAVS targets

    Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:50:07 2020 +0100

    boards: xtensa: cavs: used Zephyr mask macro

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed May 27 15:49:46 2020 +0100

    soc: xtensa: move code to SOF

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 26 11:40:36 2020 +0100

    soc: xtensa: use SOF versions of clk

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:38:45 2020 +0300

    soc: intel_adsp: Send FW ready for non SOF configuration

    Configure windows and send FW ready when used without SOF, should be
    loaded with fw_loader script.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 18:02:22 2020 +0300

    soc: intel_adsp: Use SOF version of the file

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:47:27 2020 +0300

    soc: intel_adsp: Clean up include headers

    Remove SOF mentions from the SOC headers.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:43:05 2020 +0300

    soc: intel_adsp: Move SOF specific code to samples/audio/sof

    Move SOF specific code to the SOF sample.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:39:42 2020 +0300

    soc: intel_adsp: Use SOF module's version of mem_window.c

    Use exact copy from SOF module.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 17:36:41 2020 +0300

    soc: intel_adsp: Use exact copy from SOF module

    Use SOF module verion of the clk.c

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 25 14:03:35 2020 +0300

    soc: xtensa: Add {SOC_FAMILY}/common/include path

    Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist.
    Fixes issues for xtensa SOCs.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:18:50 2020 +0100

    soc: xtensa: cavs common: fix headers for build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:10:57 2020 +0100

    soc: xtensa: adsp: add so_inthandlers.h for Intel platforms

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 25 16:08:26 2020 +0100

    cmake: xtensa: select correct compiler per CAVS target.

    TODO: what about XCC ?

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue May 19 14:59:26 2020 +0300

    boards: up_squared_adsp: Move SOF configuration to samples

    Move SOF-specific configuration to samples/audio/sof prj.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 15 15:29:50 2020 +0300

    soc: intel_adsp: Move SOF code to modules/audio/sof

    Move SOF dependent code out of SOC area.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 14 17:30:38 2020 +0300

    Move task_main_start() to audio/sof sample

    Start task_main_start() from main of audio/sof sample.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed May 13 15:37:20 2020 +0300

    Rename up_xtreme_adsp to intel_adsp_cavs18

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon Apr 27 14:12:59 2020 +0300

    Add sample audio/sof for SOF initialization

    Add dedicated sample where we put SOF specific initialization.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 18:49:36 2020 +0300

    WIP: soc: cavs_v18: Cleanup

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:44:06 2020 +0300

    soc: cavs_v15: Move soc init to common part

    Moving SOC init to the right place.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Mon May 11 15:02:28 2020 +0300

    soc: intel_adsp: Move common part to special dir

    Moving common part to common/adsp.c

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Fri May 8 14:37:50 2020 +0300

    boards: up_xtreme_adsp: Add initial up_xtreme_adsp board

    Add initial board copying existing up_squared_adsp board and using
    CAVS1.8 SOC family.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu May 7 15:30:51 2020 +0300

    soc: intel_adsp: Generalize bootloader

    Move bootloader to soc/xtensa/intel_adsp making it available for other
    boards.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:31:00 2020 +0100

    boards: xtensa: up_squared: Add support for all CAVS

    Add boot support for all CAVS versions. TODO: needs to be made common

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Tue May 5 21:25:34 2020 +0100

    soc: xtensa: intel_adsp: Manage cache for DMA descriptors

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 21:10:50 2020 +0100

    soc: xtensa: adsp: use 24M567 clock

    Use audio clock

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon May 4 10:04:01 2020 +0100

    xtensa: soc: adsp: enable system agent

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:03:07 2020 +0100

    soc: xtensa: intel_adsp: increase mem pool to 192k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 15:02:31 2020 +0100

    soc: xtensa: intel_adsp: re-enable DMA trace

    Buffer will be empty (as trace items sent to Zephyr LOG) but
    logic is running.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 11:18:55 2020 +0100

    soc: xtensa: intel: dont use uncache region yet.

    Some code was still using this region. Use later.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun May 3 10:07:28 2020 +0100

    soc: xtensa: intel_adsp: fix notifier init

    Topology now loads.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:18:38 2020 +0100

    boards: up2: Need to use sof config for bootloader

    This will need uncoupled at some point. For testing today.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 21:16:38 2020 +0100

    boards: up2: increase heap to 128k

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:35:19 2020 +0300

    boards: up_squared_adsp: Use bigger HEAP

    Use HEAP from old demo.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri May 1 16:06:32 2020 +0100

    soc: xtensa: intel_adsp: Fix config.h naming collisions

    Rename sof version to sof-config.h

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Thu Apr 30 11:22:42 2020 +0300

    Small cleanups

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 22:00:44 2020 +0300

    tests: sof/audio: Test ll scheduler

    Add more tests for scheduler.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 29 18:38:35 2020 +0300

    tests: Add first schedule test

    Add initial test for testing scheduling.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 29 13:36:23 2020 +0100

    soc: xtensa: rmeove build warnings

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 18:04:33 2020 +0300

    soc/intel_adsp: Register sof logging

    Register sof logging for tracing

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 14:16:55 2020 +0300

    boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE

    Define HEAP_MEM_POOL_SIZE when SOF enabled.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 28 10:09:20 2020 +0300

    tests: audio/sof: Add interrupt API for testing

    Add initial interrupt API for testing.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 15:54:28 2020 +0100

    soc: xtensa: adsp: Update linker script for SOF sections.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 27 11:20:01 2020 +0100

    soc: xtensa: adsp: send SOF FW metadata as boot message

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 26 21:47:20 2020 +0100

    soc: xtensa: adsp: re-enable all SOF IP init.

    Do all SOF IP init.

    TODO: ATOMCTL, WFI on LX6

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sat Apr 25 15:30:40 2020 +0100

    soc: xtensa: irq: Make sure IPC IRQ is registered.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 20:56:09 2020 +0300

    tests: sof: Enable console

    Enable console for the test.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 17:57:22 2020 +0300

    soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR

    Use correct value for XTENSA_KERNEL_CPU_PTR_SR.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Wed Apr 22 14:48:31 2020 +0300

    tests: audio/sof: Add tests for alloc API testing

    Add initial tests for allocation API testing. Can be extended for
    other later.

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 17:49:32 2020 +0300

    logging: Enable xtensa simulator backend for ADSP

    Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP.

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 20:58:30 2020 +0100

    soc: xtensa: add common cpu logic

    Support for additional cores.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
 Date:   Tue Apr 21 10:11:07 2020 +0300

    Update west.yaml to point to the latest repo

    Update west.yaml

    Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:17:01 2020 +0100

    soc: xtensa: cavs: Fix build for clk.c on cavs18+

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:31 2020 +0100

    soc: xtensa: cavs15: removed unused headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:05:09 2020 +0100

    soc: xtensa: cavs25: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:52 2020 +0100

    soc: xtensa: cavs20: align with SOF headers

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 16:03:09 2020 +0100

    soc: xtensa: cavs18:  Align with SOF headers.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Apr 20 11:42:39 2020 +0100

    west: sof: Updated to latest version.

    Now builds, links and runs SOF code (but not to FW ready).

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Sun Apr 19 13:28:53 2020 +0100

    xtensa: intel adsp: build in SOF symbols if CONFIG_SOF

    Code now fully links against SOF. Needs to be run tested.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:19:28 2020 -0700

    DO NOT MERGE: temporarily add thesoftproject as remote for sof module

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Wed Apr 15 10:33:40 2020 -0700

    ipm: cavs_idc: use the IPC/IDC definitions in SoC

    The SoC definitions have the necessary IPC/IDC bits so there is
    no need to define them separately.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 14:30:20 2020 +0100

    TODO: config: Use static config for SOF module.

    TODO: needs to be generated as part of SOF kconfig

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Fri Apr 10 21:56:07 2020 +0100

    HACK: Add SOF into build

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:55:15 2020 +0100

    west: modules: Add SOF audio module.

    Add support for building SOF as a Zephyr module. This is the starting
    point for add SOF audio into Zephyr. Currently builds but does not use
    any symbols yet.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:48:48 2020 +0100

    WIP soc: adsp-cavs15: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Apr 15 13:43:44 2020 +0100

    WIP soc: adsp-common: Use same include directory structure as SOF

    Use the same directory structure as SOF to simplify porting and allow
    SOF to build without Zephyr until porting work is complete.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:36:32 2020 +0000

    WIP: soc: adsp-common: cache is common across all Intel ADSP platforms

    De-duplicate soc.h cache definitions.
    TODO: this needs done for other common functions.
    TODO: need to fix include path

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:43 2020 -0700

    WIP: soc: cavs25: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:07:12 2020 -0700

    WIP: soc: cavs20: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 30 11:06:40 2020 -0700

    WIP: soc: cavs18: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 12:37:17 2020 -0700

    soc: intel_adsp: use main_entry.S in common for cavs_v15

    The files are identical anyway.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:38:14 2020 -0700

    soc: intel_adsp/cavs_v15: link common code

    Let cavs_v15 link against the code compiled under common/.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 13:08:28 2020 +0000

    WIP: soc: common: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:37:32 2020 +0000

    WIP soc: adsp-cavs15: build power down support

    Build the power down support for CAVS1.5

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 12:40:17 2020 +0000

    WIP: soc: cavs15: Import SOF SoC support

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 16 14:30:08 2020 +0000

    soc: cavs15: Add missing SHIM registers.

    SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Mon Mar 9 15:43:01 2020 +0000

    xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating

    Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead.

    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
 Date:   Wed Feb 26 15:28:48 2020 +0000

    boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL

    SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL
    module.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>
    Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 10:45:15 2020 -0700

    soc: add Intel Audio DSP SoC family

    This creates a SoC family for the audio DSPs on various
    Intel CPUs. The intel_apl_adsp is being moved into
    this family as well, since it is part of the CAVS v1.5
    series of DSPs.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Daniel Leung <daniel.leung@intel.com>
 Date:   Mon Mar 30 11:29:02 2020 -0700

    soc: xtensa: add CMakeLists.txt

    Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt
    inside each SoC directory will be included, similar to
    what ARM and RISCV have.

    Signed-off-by: Daniel Leung <daniel.leung@intel.com>

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:43 2020 -0700

    Revert "boards: up_squared_adsp: Add flasher script"

    This reverts commit 80f295a9dd.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:32 2020 -0700

    Revert "boards: up_squared_adsp: Update logtool tool"

    This reverts commit 7770d182c1.

 Author: Andy Ross <andrew.j.ross@intel.com>
 Date:   Wed Jun 17 12:30:23 2020 -0700

    Revert "soc: intel_adsp: Generalize bootloader"

    This reverts commit d6a33ef467.

 Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>

    soc: xtensa; intel: remove sof-config.h - SQUASH

    No longer used.

Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
2020-10-21 06:38:53 -04:00
Frank Li
877f181300 boards: mm_swiftio: remove spi default pinmux
GPIO_AD_B0_01 is connected to the reset pin through a specific circuit.
This is a special mechanism of swiftio to check the download. Therefore,
it can't be default to the pinmux of spi3, and spi3 will be dynamically
configured in the application.

Signed-off-by: Frank Li <lgl88911@163.com>
2020-10-20 12:02:41 -05:00
Marcin Niestroj
2e648d4872 drivers: wifi: esp: rename wifi-reset-gpios to reset-gpios
Most DT bindings use reset-gpios name when there is a pin to reset whole
chip. Rename wifi-reset-gpios to reset-gpios to be more consistent
between various drivers. Additionally this prevents confusion, as
somebody might think that this pin resets only WiFi, which is not true.

Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
2020-10-20 07:32:01 -05:00
Ioannis Glaropoulos
49c56b4071 boards: nucleo_l552ze_q_ns: pass compiler name to the post-build script
Pass the compiler name and path to the TF-M post-build
script as an argument, so the TF-M build can work with
the Zephyr SDK as well (not only with the GNU ARM embedded
toolchain.)

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Ioannis Glaropoulos
a152e82f4a boards: arm: add documentation for integrating TF-M on nRF platforms
Add the required documentation extensions for the nRF5340
and the nRF9160 DKs that explains how to build and run
Zephyr with TF-M as the Secure firmware image counterpart.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Ioannis Glaropoulos
eea78b1ea9 boards: arm: Add support for TF-M in nRF9160 DK
Adding support for TF-M in the Nordic nRF9160 DK.
Allow the TF-M integration samples to be built and
executed for nRF9160 DK.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Ioannis Glaropoulos
e2dc8982be boards: arm: Add support for TF-M in nRF5340 PDK
Adding support for TF-M in the Nordic nRF5340
Application MCU.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Ioannis Glaropoulos
310999da5b boards: arm: update tfm post-build scripts after upmerge
Update the TF-M post-build scripts in the relevant
ARM platforms in the wake of updating TF-M to the
latest upstream.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Ioannis Glaropoulos
c9fd62a2ea boards: arm: update board definitions due to new TF-M build system
TF-M related information in the relevant board definitions
needs to be updated in the wake of the new TF-M Build
system.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-19 21:08:34 +02:00
Erwan Gouriou
3a125e6f0f boards: 96_carbon: Configure spi pins using device tree
Define SPI1 pinctrl using device tree

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-19 10:24:01 -05:00
Erwan Gouriou
aa72f05267 boards: disco_l475_iot1: Configure SPI3 pins using device tree
Demonstrate configuration of spi pins via devicetree.

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-19 10:24:01 -05:00
Kumar Gala
ccc16a41bd drivers: i2c: Move Kconfig I2C instances to esp32
The only user of the I2C instances is the esp32 driver.  Move the
Kconfig symbols down to the esp32 Kconfig for the instances it needs.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-16 06:36:18 -04:00
Ioannis Glaropoulos
e121052c13 boards: arm: enable HW stack protection by default on Atmel boards
Enable HW stack protection by default in the board
definitions of ATMEL-based platforms.

Signed-off-by: Ioannis Glaropoulos <Ioannis.Glaropoulos@nordicsemi.no>
2020-10-16 10:07:20 +02:00
Steven Daglish
f4ed379cce boards: arm: add support for NUCLEO-L011K4 board
Support for the NUCLEO-L011K4 development board with STM32L011K4 SoC.

Although the SoC only contains 16K flash and 2K RAM, it has been tested
on a number of samples and has worked as expected.

Signed-off-by: Steven Daglish <s.c.daglish@gmail.com>
2020-10-16 10:00:08 +02:00
Mahesh Mahadevan
4db6f4c735 doc: Add clock control details
Include support for clock control in the documentation

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
2020-10-15 11:17:24 -05:00
Yestin Sun
26a8f3765b boards: stm32l562e_dk: add support for stm32l562e_dk
Add support for the STM32L562E-DK Discovery board
(based on the nucleo_l552ze_q board).
Tested with hello_world, basic/blinky, basic/button.

Signed-off-by: Yestin Sun <sunyi0804@gmail.com>
2020-10-15 09:53:00 -05:00
Peter Bigot
b1e4f89c13 boards: particle: fix spi overlays
These need an initial compatible to be recognized as SPI devices.

Also fix a typo in the base include file, and ensure the overlays are
the same for all variants.

Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
2020-10-14 17:55:50 -05:00
Frank Li
53cc090c39 boards: mm_swiftio: enable pwm devices
Enable pwm device for mm_swiftio.
select HAS_MCUX_PWM for rt1052.

Signed-off-by: Frank Li <lgl88911@163.com>
2020-10-14 15:33:10 -05:00
Christopher Friedt
de4894ad8b doc: board: cc1352r_sensortag: fix ordered list in index.rst
Minor syntax issue in an ordered list.

Fixes #29089

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-10-14 13:05:21 -07:00
Erwan Gouriou
cb22d8ece7 boards: stm32: Convert boards I2C pins to devicetree
Get STM32 boards configuring I2C using device tree and
remove configuration from pinmux.c

Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
2020-10-14 11:14:15 -05:00
Armando Visconti
28390d71f6 board/shields: x-nucleo-iks01a2: Add support to shub mode
Add the overlay file for sensorhub mode and update the
shield documentation.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
2020-10-14 08:41:41 -05:00
Thorvald Natvig
e212e4c65a boards: arm: efm32gg_*: Enable OpenOCD
This enables OpenOCD for the EFM32GG11 development kits, but keeps
the default as jlink.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 08:35:20 -05:00
Thorvald Natvig
c3e2a0205a boards: arm: efm32gg_*: Enable SWO logging
This enables SWO logging for the EFM32GG11 development kits.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 08:35:20 -05:00
Thorvald Natvig
b0884498e4 boards: arm: efm32gg_*: Use 72Mhz HFRCO to drive CPU
This makes the 72Mhz HFRCO drive the MCU HF clock, and only uses
the HFXO to drive the ethernet clock.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 08:35:20 -05:00
Thorvald Natvig
8db1e20639 boards: arm: efm32gg_*: Enable TRNG
This defines the TRNG for EFM32GG11 and enables it for trng0
in the dts for the matching development kits.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 08:35:20 -05:00
Thorvald Natvig
f629d4edae boards: arm: efm32gg_*: Enable watchdog
This defines wdog0 and wdog1 for the EFM32GG11 MCU and enables wdog0
in the dts for the matching development kits.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 08:35:20 -05:00
Martin Jäger
cd908d9085 boards: arm: stm32: use DT for ADC pinmux
Use the new DT facilities to configure ADC pinmux on all boards with
STM32 MCUs currently supporting the ADC.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-14 07:15:12 -05:00
Krzysztof Chruscinski
a1a0ffd0d1 board: arm: nrf: Set uart0 compatible to nordic,nrf-uarte
Update nordic boards to use UARTE driver for UART0 by default.

Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
2020-10-14 14:06:25 +02:00
Thorvald Natvig
4d0750920b drivers: ethernet: eth_gecko: Fetch MAC address from device info
If neither a random address nor a specific local address is in the
device tree, then use the MAC address from the device information page.

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-14 12:31:49 +03:00
Gerson Fernando Budke
8d563d6507 boards: cy8ckit_062_wifi_bt: Squash M4 and M0 boards
The Cypress cy8ckit_062_wifi_bt kit is splitted on two directories.
There is no reason to keep it separated. This squash M4 and M0 boards
as one board file.

Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
2020-10-13 13:16:09 +02:00
Kumar Gala
70015cfe57 boards: arm: st: Update dts for CAN pinmux
Add pinctrl-0 property for CAN nodes and remove pinmux.c.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-13 13:13:08 +02:00
Toby Firth
dc37f988e0 drivers: adc: added support adc driver for lpcexpresso55s69
Added shim driver for the LPADC for lpcexpresso55s69 board.

Fixes #22703.

Signed-off-by: Toby Firth <tobyjfirth@gmail.com>
2020-10-12 14:59:40 -05:00
Thorvald Natvig
7f9f4e6597 boards: Add SiLabs SLWSTK6121A (WGM160P)
The WGM160P module combines the WF200 Wi-Fi transceiver with
an EFM32GG11 MCU
This code is based on the efm32gg_stk3701a board definitions

Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
2020-10-12 14:46:19 -05:00
Vinayak Kariappa Chettimada
babd7289eb Bluetooth: controller: Move bsim radio hal header
Move the bsim radio hal header for nrfxx into the
controller's hal folder.

Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
2020-10-12 19:34:13 +02:00
Martin Jäger
c765b92944 boards: arm: nucleo stm32: use DT for DAC pinmux
Use the new DT facilities to configure DAC pinmux on all STM32 nucleo
boards currently supporting the DAC.

Signed-off-by: Martin Jäger <martin@libre.solar>
2020-10-12 08:49:36 -05:00
Rubin Gerritsen
51e7da292a boards: nrf52_bsim: Use simplified nrf_bsim_models
The simplified bsim implementation reuses nrfx directly instead
of using manually modified header files.

Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
2020-10-12 13:11:12 +02:00
Rubin Gerritsen
857ed0a380 boards: nrf52_bsim: no-op arm functions as defines
The nrf52 bsim hw models now require some of these to
be defined. For this case we cannot implement these
as static inline functions as that would redefinitions
of the functions.

Signed-off-by: Rubin Gerritsen <rubin.gerritsen@nordicsemi.no>
2020-10-12 13:11:12 +02:00
Watson Zeng
0d04754652 boards: arc: nsim_em7d_v22: switch to ns16550 UART model
In PR #26836, we switch nSIM from custom legacy ARC UART model
to ns16550 model, which will allow us to use zephyr images build for
nSIM on other platforms like HAPS, QEMU, etc...
In PR #27334, which introduce new board nsim_em7d_v22, has gone
parallel to the switch to dwuart, and is still using legacy model.
With wrong configuration, the uart for nsim_em7d_v22 has no output,
which cause all tests failure.

Signed-off-by: Watson Zeng <zhiwei@synopsys.com>
2020-10-09 13:31:11 -07:00
Martí Bolívar
8165008f44 dts: remove legacy macro support
The legacy macros were first deprecated in Zephyr v2.3. Now that
Zephyr v2.4 has been released, that makes two releases where these
macros have been deprecated, so it's OK to remove them.

This leaves support for legacy binding syntax in place. Removing that
is left to future work.

We need to update various pieces of documentation related to flash
partitions that never got updated when the new API was introduced.
Consolidate this information in the flash_map.h API reference page,
since that's really where users will run into it. This also gives us
the opportunity to improve this documentation.

Adjust a couple of kconfigfunctions.py and sanitycheck bits to use
non-legacy edtlib APIs.

Signed-off-by: Martí Bolívar <marti.bolivar@nordicsemi.no>
2020-10-09 08:45:38 -05:00
Kumar Gala
9c753aba3b boards: arm: nucleo_f030r8: Fix pinmux for I2C2 pins
The variant of STM32F030R8 on the board is STM32F030R8T6 which does not
have I2C2 SCL/SDA on PA11/PA12.  Change the pinmux to use PB10/PB11
instead.

Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
2020-10-09 11:52:17 +02:00
Armand Ciejak
ac31c4e458 eth: mcux: Get rid of CONFIG_ETH_MCUX_*
Use node's status in device tree instead.

Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
2020-10-09 11:50:50 +02:00
Maureen Helm
4310b7ed1a boards: arm: Enable hardware stack protection on nxp lpc boards
Enables hardware stack protection on all possible nxp lpc boards to
help detect stack overflows more easily. Boards that do not have mpu
support are excluded.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-09 10:23:34 +02:00
Maureen Helm
bc9a498bdf boards: arm: Enable hardware stack protection on nxp kinetis boards
Enables hardware stack protection on all possible nxp kinetis boards to
help detect stack overflows more easily. Boards that do not have mpu
support are excluded.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-09 10:23:34 +02:00
Maureen Helm
549c7f3f49 boards: arm: Enable hardware stack protection on nxp i.mx rt boards
Enables hardware stack protection on all nxp i.mx rt boards to help
detect stack overflows more easily.

Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
2020-10-09 10:23:34 +02:00
Christopher Friedt
310d149d8b boards: cc1352r_sensortag: add support for TI CC1352R SensorTag
The TI CC1352R SensorTag (LPSTK-CC1352R) is a development kit that
features the CC1352R SoC.

Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
2020-10-08 16:08:36 -04:00
Frank Li
e3b5ddac65 dts: boards: mm_swiftio: enable more devices
Enable i2c/spi/uart devices for mm_swiftio.

Signed-off-by: Frank Li <lgl88911@163.com>
2020-10-08 14:23:01 -05:00
Jeremy LOCHE
3caba2d527 boards: nucleo_l432kc: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
a76d091a45 boards: stm32mp157c_dk2: configure serial pins from DT
usart3, uart7 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
da323092fc boards: 96b_avenger96: configure serial pins from DT
uart4, uart7 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
21c88b985c boards: nucleo_f411re: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
e5d3ee18cb boards: nucleo_l152re: configure serial pins from DT
usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
281580ab9a boards: 96b_carbon: configure serial pins from DT
usart1, usart2, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
979f39ac95 boards: nucleo_f303re: configure serial pins from DT
usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
837a111d4e boards: nucleo_l496zg: configure serial pins from DT
usart2, lpuart1 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
73ad1184df boards: nucleo_f446re: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
3ac7283af4 boards: nucleo_wb55rg: configure serial pins from DT
usart1, lpuart1 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
b18f9b2f6e boards: nucleo_f412zg: configure serial pins from DT
usart3, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
4eca6010d3 boards: stm32g0316_disco: configure serial pins from DT
usart1 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
22d719fe60 boards: olimex_stm32_e407: configure serial pins from DT
usart1, usart3, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
437dc2e15e boards: nucleo_f429zi: configure serial pins from DT
usart3, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
d2cfd9fe58 boards: adafruit_feather_stm32f405: configure serial pins from DT
usart3 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
f72144cad3 boards: stm32373c_eval: configure serial pins from DT
usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
5970fc2831 boards: nucleo_f030r8: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
5e4a6b2f66 boards: steval_fcu001v1: configure serial pins from DT
usart1 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
110d15179a boards: mikroe_mini_m4_for_stm32: configure serial pins from DT
usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
4be9c02847 boards: stm32l1_disco: configure serial pins from DT
usart1, usart2, usart3 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
ca97beab32 boards: stm32f0_disco: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
b06dc131dc boards: b_l072z_lrwan1: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
99f5a08354 boards: stm32f469i_disco: configure serial pins from DT
usart3, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
b0a91aa6b7 boards: stm32f769i_disco: configure serial pins from DT
usart1, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
8f01cfccdd boards: stm32f3_disco: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
c0fc2649fe boards: sensortile_box: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
839203930f boards: b_l4s5i_iot01a: configure serial pins from DT
usart1, uart4 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
5f61d2ce6f boards: 96b_argonkey: configure serial pins from DT
usart1 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
f6b0242084 boards: stm32f4_disco: configure serial pins from DT
usart1, usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
9f79a69665 boards: nucleo_f103rb: configure serial pins from DT
usart1, usart2, usart3 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
320fe732d6 boards: nucleo_g071rb: configure serial pins from DT
usart2 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
3beceebee8 boards: nucleo_f746zg: configure serial pins from DT
usart2, usart3, usart6 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
cfbf55fd38 boards: disco_l475_iot1: configure serial pins from DT
uart4 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
44c6ef56ea boards: blackpill_f411ce: configure serial pins from DT
usart1 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00
Jeremy LOCHE
2e5111b36c boards: nucleo_l476rg: configure serial pins from DT
usart1, usart2, usart3 pinmuxes are now configured from DT pinctrl.

Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
2020-10-08 05:05:20 -05:00