Michal Sieron eff89c6b24 drivers: timer: litex_timer: Fix sys_clock_cycle_get functions ... e8e88dea incorrectly changed registers used in `sys_clock_cycle_get(32|64)` functions. This commit fixes that. Signed-off-by: Michal Sieron <msieron@internships.antmicro.com>		2022-05-10 18:41:20 +02:00
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andes
espressif
gigadevice
ite
microsemi
openisa	dts: riscv: openisa: Move SoC devicetree includes under a vendor dir	2022-05-09 17:54:48 -04:00
sifive
starfive
telink	dts: riscv: telink: Move SoC devicetree includes under a vendor dir	2022-05-09 17:54:48 -04:00
mpfs-icicle.dtsi
neorv32.dtsi
riscv32-litex-vexriscv.dtsi	drivers: timer: litex_timer: Fix sys_clock_cycle_get functions	2022-05-10 18:41:20 +02:00
virt.dtsi