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https://github.com/zephyrproject-rtos/zephyr
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bdeece01b8
clear RXNE flag in fifo_read, remove TEACK and REACK check when uart_stm32_init because stm32f2 doesn't has those flags. Signed-off-by: qianfan Zhao <qianfanguijin@163.com>
51 lines
1.4 KiB
Plaintext
51 lines
1.4 KiB
Plaintext
/*
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* Copyright (c) 2018 qianfan Zhao
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <dt-bindings/pinctrl/stm32-pinctrl.h>
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/ {
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soc {
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pinctrl: pin-controller@40020000 {
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usart1_pins_a: usart1@0 {
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rx_tx {
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rx = <STM32_PIN_PB7 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PB6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart1_pins_b: usart1@1 {
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rx_tx {
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rx = <STM32_PIN_PA10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA9 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart2_pins_a: usart2@0 {
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rx_tx {
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rx = <STM32_PIN_PA3 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PA2 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart2_pins_b: usart2@1 {
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rx_tx {
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rx = <STM32_PIN_PD5 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PD6 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart3_pins_a: usart3@0 {
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rx_tx {
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rx = <STM32_PIN_PB11 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PB10 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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usart3_pins_b: usart3@1 {
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rx_tx {
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rx = <STM32_PIN_PD9 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUPDR_NO_PULL)>;
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tx = <STM32_PIN_PD8 (STM32_PINMUX_ALT_FUNC_7 | STM32_PUSHPULL_NOPULL)>;
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};
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};
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};
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};
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};
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