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https://github.com/zephyrproject-rtos/zephyr
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07160fa153
SPARC is an open and royalty free processor architecture. This commit provides SPARC architecture support to Zephyr. It is compatible with the SPARC V8 specification and the SPARC ABI and is independent of processor implementation. Functionality specific to SPRAC processor implementations should go in soc/sparc. One example is the LEON3 SOC which is part of this patch set. The architecture port is fully SPARC ABI compatible, including trap handlers and interrupt context. Number of implemented register windows can be configured. Some SPARC V8 processors borrow the CASA (compare-and-swap) atomic instructions from SPARC V9. An option has been defined in the architecture port to forward the corresponding code-generation option to the compiler. Stack size related config options have been defined in sparc/Kconfig to match the SPARC ABI. Co-authored-by: Nikolaus Huber <nikolaus.huber.melk@gmail.com> Signed-off-by: Martin Åberg <martin.aberg@gaisler.com>
87 lines
2.0 KiB
ArmAsm
87 lines
2.0 KiB
ArmAsm
/*
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* Copyright (c) 2019-2020 Cobham Gaisler AB
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <toolchain.h>
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#include <linker/sections.h>
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#include <offsets_short.h>
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#include <arch/sparc/sparc.h>
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GTEXT(__sparc_trap_fault)
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/*
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* Fault trap handler
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*
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* - IU state is saved and restored
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*
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* On entry:
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* %l0: psr (set by trap code)
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* %l1: pc
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* %l2: npc
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* %l6: tbr (set by trap code)
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* %fp: %sp of current register window at trap time
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*
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* This trap handler will trash some of the global registers, which is OK since
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* we will not return to where we trapped.
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*/
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SECTION_FUNC(TEXT, __sparc_trap_fault)
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/* We may have trapped into the invalid window. If so, make it valid. */
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rd %wim, %g2
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srl %g2, %l0, %g3
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cmp %g3, 1
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bne .Lwodone
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nop
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/* Do the window overflow. */
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sll %g2, (CONFIG_SPARC_NWIN-1), %g3
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srl %g2, 1, %g2
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or %g2, %g3, %g2
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/* Enter window to save. */
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save
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/* Install new wim calculated above. */
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mov %g2, %wim
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nop
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nop
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nop
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/* Put registers on the dedicated save area of the ABI stack frame. */
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std %l0, [%sp + 0x00]
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std %l2, [%sp + 0x08]
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std %l4, [%sp + 0x10]
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std %l6, [%sp + 0x18]
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std %i0, [%sp + 0x20]
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std %i2, [%sp + 0x28]
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std %i4, [%sp + 0x30]
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std %i6, [%sp + 0x38]
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/* Leave saved window. */
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restore
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.Lwodone:
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/* Allocate an ABI stack frame and exception stack frame */
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sub %fp, 96 + __z_arch_esf_t_SIZEOF, %sp
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/*
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* %fp: %sp of interrupted task
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* %sp: %sp of interrupted task - ABI_frame - esf
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*/
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/* Fill in the content of the exception stack frame */
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st %l1, [%sp + 96 + __z_arch_esf_t_pc_OFFSET]
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st %l2, [%sp + 96 + __z_arch_esf_t_npc_OFFSET]
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st %l0, [%sp + 96 + __z_arch_esf_t_psr_OFFSET]
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st %l6, [%sp + 96 + __z_arch_esf_t_tbr_OFFSET]
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st %fp, [%sp + 96 + __z_arch_esf_t_sp_OFFSET]
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rd %y, %g1
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st %g1, [%sp + 96 + __z_arch_esf_t_y_OFFSET]
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/* Enable traps, raise PIL to mask all maskable interrupts. */
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or %l0, PSR_PIL, %o0
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wr %o0, PSR_ET, %psr
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nop
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nop
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nop
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/* Exception stack frame prepared earlier is the first argument. */
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call _Fault
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add %sp, 96, %o0
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