Zide Chen d27f6cb5eb interrupt_controller: program local APIC LDR register for xAPIC ... If IO APIC is in logical destination mode, local APICs compare their logical APIC ID defined in LDR (Logical Destination Register) with the destination code sent with the interrupt to determine whether or not to accept the incoming interrupt. This patch programs LDR in xAPIC mode to support IO APIC logical mode. The local APIC ID from local APIC ID register can't be used as the 'logical APIC ID' because LAPIC ID may not be consecutive numbers hence it makes it impossible for LDR to encode 8 IDs within 8 bits. This patch chooses 0 for BSP, and for APs, cpu_number which is the index to x86_cpuboot[], which ultimately assigned in z_smp_init[]. Signed-off-by: Zide Chen <zide.chen@intel.com>		2020-05-08 22:32:39 -04:00
..
core	interrupt_controller: program local APIC LDR register for xAPIC	2020-05-08 22:32:39 -04:00
include	kernel: remove legacy fields in _kernel	2020-05-08 17:42:49 +02:00
CMakeLists.txt	x86: consolidate x86_64 architecture, SoC and boards	2019-10-25 17:57:55 -04:00
gen_gdt.py
gen_idt.py
ia32.cmake
intel64.cmake
Kconfig	x86: implement kernel page table isolation	2020-01-17 16:17:39 -05:00