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Carlo Caione 6f36300219 drivers: timer: Add per-core ARM architected timer
ARM cores may have a per-core architected timer, which provides per-cpu
timers, attached to a GIC to deliver its per-processor interrupts via
PPIs. This is the most common case supported by QEMU in the virt
platform.

This patch introduces support for this timer abstracting the way the
timer registers are actually accessed. This is needed because different
architectures (for example ARMv7-R vs ARMv8-A) use different registers
and even the same architecture (ARMv8-A) can actually use different
timers (ELx physical timers vs ELx virtual timers).

So we introduce the common driver here but the actual SoC / architecture
/ board must provide the three helpers (arm_arch_timer_set_compare(),
arm_arch_timer_toggle(), arm_arch_timer_count()) using an header file
imported through the arch/cpu.h header file.

Signed-off-by: Carlo Caione <ccaione@baylibre.com>
2020-02-01 08:08:43 -05:00
.github/ISSUE_TEMPLATE
.known-issues
arch arch: arm: mpu: no dynamic MPU re-program in swap if not required 2020-01-31 21:38:35 +01:00
boards intel_s1000_crb: we not can build this with zephyr sdk 2020-01-31 14:51:37 -05:00
cmake
doc Bluetooth: Host: Add generic pairing query callback 2020-01-31 20:39:25 +02:00
drivers drivers: timer: Add per-core ARM architected timer 2020-02-01 08:08:43 -05:00
dts drivers: timer: Add per-core ARM architected timer 2020-02-01 08:08:43 -05:00
ext
include drivers: timer: Add per-core ARM architected timer 2020-02-01 08:08:43 -05:00
kernel
lib
misc
modules
samples samples: net: set CONFIG_NET_BUF_RX_COUNT to 64 2020-01-31 15:03:28 -05:00
scripts scripts/sanitycheck: fix merging OVERLAY_CONFIG extra args 2020-01-31 15:55:36 -05:00
soc intel_s1000: various fixes for build errors 2020-01-31 14:51:37 -05:00
subsys subsys/logging: Fix xtensa simcall assembly 2020-02-01 08:08:19 -05:00
tests drivers: timer: Add per-core ARM architected timer 2020-02-01 08:08:43 -05:00
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