mirror of
https://github.com/zephyrproject-rtos/zephyr
synced 2025-08-12 16:36:12 +00:00
542a7fa25d
The IRQ handler has had a major changes to manage syscall, reschedule and interrupt from user thread and stack guard. Add userspace support: - Use a global variable to know if the current execution is user or machine. The location of this variable is read only for all user thread and read/write for kernel thread. - Memory shared is supported. - Use dynamic allocation to optimize PMP slot usage. If the area size is a power of 2, only one PMP slot is used, else 2 are used. Add stack guard support: - Use MPRV bit to force PMP rules to machine mode execution. - IRQ stack have a locked stack guard to avoid re-write PMP configuration registers for each interruption and then win some cycle. - The IRQ stack is used as "temporary" stack at the beginning of IRQ handler to save current ESF. That avoid to trigger write fault on thread stack during store ESF which that call IRQ handler to infinity. - A stack guard is also setup for privileged stack of a user thread. Thread: - A PMP setup is specific to each thread. PMP setup are saved in each thread structure to improve reschedule performance. Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> Reviewed-by: Nicolas Royer <nroyer@baylibre.com>
117 lines
2.7 KiB
C
117 lines
2.7 KiB
C
/*
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* Copyright (c) 2016 Jean-Paul Etienne <fractalclone@gmail.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#include <kernel.h>
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#include <kernel_structs.h>
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#include <inttypes.h>
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#include <exc_handle.h>
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#include <logging/log.h>
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LOG_MODULE_DECLARE(os);
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#ifdef CONFIG_USERSPACE
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Z_EXC_DECLARE(z_riscv_user_string_nlen);
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static const struct z_exc_handle exceptions[] = {
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Z_EXC_HANDLE(z_riscv_user_string_nlen),
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};
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#endif /* CONFIG_USERSPACE */
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FUNC_NORETURN void z_riscv_fatal_error(unsigned int reason,
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const z_arch_esf_t *esf)
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{
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if (esf != NULL) {
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LOG_ERR("Faulting instruction address = 0x%08lx",
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esf->mepc);
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LOG_ERR(" ra: 0x%08lx gp: 0x%08lx tp: 0x%08lx t0: 0x%08lx",
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esf->ra, esf->gp, esf->tp, esf->t0);
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LOG_ERR(" t1: 0x%08lx t2: 0x%08lx t3: 0x%08lx t4: 0x%08lx",
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esf->t1, esf->t2, esf->t3, esf->t4);
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LOG_ERR(" t5: 0x%08lx t6: 0x%08lx a0: 0x%08lx a1: 0x%08lx",
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esf->t5, esf->t6, esf->a0, esf->a1);
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LOG_ERR(" a2: 0x%08lx a3: 0x%08lx a4: 0x%08lx a5: 0x%08lx",
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esf->a2, esf->a3, esf->a4, esf->a5);
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LOG_ERR(" a6: 0x%08lx a7: 0x%08lx\n",
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esf->a6, esf->a7);
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}
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z_fatal_error(reason, esf);
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CODE_UNREACHABLE;
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}
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static char *cause_str(ulong_t cause)
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{
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switch (cause) {
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case 0:
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return "Instruction address misaligned";
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case 1:
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return "Instruction Access fault";
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case 2:
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return "Illegal instruction";
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case 3:
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return "Breakpoint";
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case 4:
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return "Load address misaligned";
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case 5:
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return "Load access fault";
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default:
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return "unknown";
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}
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}
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void _Fault(z_arch_esf_t *esf)
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{
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#ifdef CONFIG_USERSPACE
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/*
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* Perform an assessment whether an PMP fault shall be
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* treated as recoverable.
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*/
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for (int i = 0; i < ARRAY_SIZE(exceptions); i++) {
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uint32_t start = (uint32_t)exceptions[i].start;
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uint32_t end = (uint32_t)exceptions[i].end;
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if (esf->mepc >= start && esf->mepc < end) {
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esf->mepc = (uint32_t)exceptions[i].fixup;
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return;
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}
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}
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#endif /* CONFIG_USERSPACE */
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ulong_t mcause;
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__asm__ volatile("csrr %0, mcause" : "=r" (mcause));
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mcause &= SOC_MCAUSE_EXP_MASK;
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LOG_ERR("Exception cause %s (%ld)", cause_str(mcause), mcause);
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z_riscv_fatal_error(K_ERR_CPU_EXCEPTION, esf);
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}
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#ifdef CONFIG_USERSPACE
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FUNC_NORETURN void arch_syscall_oops(void *ssf_ptr)
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{
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user_fault(K_ERR_KERNEL_OOPS);
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CODE_UNREACHABLE;
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}
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void z_impl_user_fault(unsigned int reason)
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{
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z_arch_esf_t *oops_esf = _current->syscall_frame;
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if (((_current->base.user_options & K_USER) != 0) &&
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reason != K_ERR_STACK_CHK_FAIL) {
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reason = K_ERR_KERNEL_OOPS;
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}
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z_riscv_fatal_error(reason, oops_esf);
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}
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static void z_vrfy_user_fault(unsigned int reason)
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{
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z_impl_user_fault(reason);
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}
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#include <syscalls/user_fault_mrsh.c>
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#endif /* CONFIG_USERSPACE */
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