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https://github.com/zephyrproject-rtos/zephyr
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a1b77fd589
git grep -l 'u\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/u\(8\|16\|32\|64\)_t/uint\1_t/g" git grep -l 's\(8\|16\|32\|64\)_t' | \ xargs sed -i "s/s\(8\|16\|32\|64\)_t/int\1_t/g" Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
116 lines
3.4 KiB
C
116 lines
3.4 KiB
C
/*
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* Copyright (c) 2017 Intel Corporation
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/**
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* @file
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* @brief Per-arch thread definition
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*
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* This file contains definitions for
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*
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* struct _thread_arch
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* struct _callee_saved
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*
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* necessary to instantiate instances of struct k_thread.
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*/
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#ifndef ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_H_
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#define ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_H_
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#ifndef _ASMLANGUAGE
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#include <zephyr/types.h>
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#include <arch/xtensa/xtensa_context.h>
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/*
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* The following structure defines the set of 'non-volatile' integer registers.
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* These registers must be preserved by a called C function. These are the
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* only registers that need to be saved/restored when a cooperative context
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* switch occurs.
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*/
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struct _callee_saved {
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/*
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* The following registers are considered non-volatile, i.e.
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* callee-saved, but their values are pushed onto the stack rather than
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* stored in the k_thread structure:
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*/
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uint32_t retval; /* a2 */
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XtExcFrame *topOfStack; /* a1 = sp */
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};
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typedef struct _callee_saved _callee_saved_t;
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/*
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* The following structure defines the set of 'non-volatile' x87 FPU/MMX/SSE
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* registers. These registers must be preserved by a called C function.
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* These are the only registers that need to be saved/restored when a
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* cooperative context switch occurs.
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*/
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typedef struct s_coopCoprocReg {
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/*
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* This structure intentionally left blank. Coprocessor's registers are
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* all 'volatile' and saved using the lazy context switch mechanism.
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*/
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} tCoopCoprocReg;
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/*
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* The following structure defines the set of 'volatile' x87 FPU/MMX/SSE
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* registers. These registers need not be preserved by a called C function.
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* Given that they are not preserved across function calls, they must be
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* save/restored (along with s_coopCoprocReg) when a preemptive context switch
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* occurs.
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*/
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typedef struct s_preempCoprocReg {
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/*
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* This structure reserved coprocessor control and save area memory.
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*/
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#if XCHAL_CP_NUM > 0
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char __aligned(4) cpStack[XT_CP_SIZE];
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#endif
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} tPreempCoprocReg;
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/*
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* The thread control structure definition. It contains the
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* various fields to manage a _single_ thread.
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*/
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struct _thread_arch {
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/*
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* See the above flag definitions above for valid bit settings. This
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* field must remain near the start of struct k_thread, specifically
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* before any #ifdef'ed fields since the host tools currently use a
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* fixed offset to read the 'flags' field.
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*/
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uint32_t flags;
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#ifdef CONFIG_ERRNO
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int errno_var;
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#endif
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/*
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* The location of all floating point related structures/fields MUST be
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* located at the end of struct k_thread. This way only the threads
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* that actually utilize non-integer capabilities need to account for
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* the increased memory required for storing FP state when sizing
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* stacks.
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*
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* Given that stacks "grow down" on Xtensa, and the k_thread is located
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* at the start of a thread's "workspace" memory, the stacks of threads
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* that do not utilize floating point instruction can effectively
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* consume the memory occupied by the 'tCoopCoprocReg' and
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* 'tPreempCoprocReg' structures without ill effect.
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*/
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/* non-volatile coprocessor's register storage */
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tCoopCoprocReg coopCoprocReg;
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/* volatile coprocessor's register storage */
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tPreempCoprocReg preempCoprocReg;
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};
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typedef struct _thread_arch _thread_arch_t;
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#endif /* _ASMLANGUAGE */
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#endif /* ZEPHYR_INCLUDE_ARCH_XTENSA_THREAD_H_ */
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