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zephyr/drivers/clock_control
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Florian Vaussard 33579adef9 clock: stm32f4: Fix range of CLOCK_STM32F4X_PLLN_MULTIPLIER config 
The PLLN multiplier can range between 50 and 432 on all STM32F4, except
on the STM32F401 where the lower bound is restricted to 192.

Fix the range property and the help text to reflect this reality.

Change-Id: I7b93e84b321f7869aaf611287344cd3e25c893c8
Signed-off-by: Florian Vaussard <florian.vaussard@heig-vd.ch>
2017-03-27 09:05:57 -05:00
..
beetle_clock_control.c
Kconfig
Kconfig.beetle
Kconfig.nrf5
Kconfig.quark_se
Kconfig.stm32
Kconfig.stm32f4x clock: stm32f4: Fix range of CLOCK_STM32F4X_PLLN_MULTIPLIER config 2017-03-27 09:05:57 -05:00
Kconfig.stm32f10x
Kconfig.stm32f107xx
Makefile
nrf5_power_clock.c
quark_se_clock_control.c
stm32_ll_clock.c clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00
stm32_ll_clock.h clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00
stm32f3x_ll_clock.c
stm32f4x_clock.c
stm32f10x_clock.c
stm32f107xx_clock.c clock_control: fix to get PLL2 source for PREDV1 working 2017-02-22 18:09:22 -06:00
stm32l4x_ll_clock.c clock_control: stm32: code optimization 2017-02-10 14:47:41 -06:00