Following migration of all in-tree boards to device tree bindings
for USB pins configuration, deprecate USB related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for ETH pins configuration, deprecate ETH related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for ADC pins configuration, deprecate ADC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for SPI pins configuration, deprecate SPI related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for I2C pins configuration, deprecate I2C related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for CAN pins configuration, deprecate DAC related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for serial pins configuration, deprecate CAN related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for serial pins configuration, deprecate (LP)U(S)ART related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Following migration of all in-tree boards to device tree bindings
for pwm pins configuration, deprecate PWN related macros.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Reworks the mcux ethernet driver to use DT_INST_FOREACH_STATUS_OKAY and
eliminate a lot of duplicate code between instance 0 and instance 1.
Renames the ERR_MISC interrupt to ERR due to an issue with the
underscore in the device tree preprocessor macros.
Signed-off-by: Maureen Helm <maureen.helm@nxp.com>
Add uart bus interface to extended esWIFI driver. This enables all
Inventek modules with IWIN AT Commands firmware.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
The WIFI_ESWIFI_NAME config would be uselful when there is no device
tree alternative. The esWIFI driver already is on device tree and the
label property exists. This remove WIFI_ESWIFI_NAME Kconfig variable
and switch to device tree equivalent.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
Remove global access to structure eswifi_spi_data variable. Instead,
add a method to pass access to that structure. This allows better
control to the data bus variable.
Signed-off-by: Gerson Fernando Budke <gerson.budke@atl-electronics.com>
This is a temporary workaround for an issue in TI's RF Driver
API. A subsequent release of the SimpleLink SDK will mitigate
the need for it and it can be reverted when hal/ti receives
that update.
Fixes#29418
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
This change reworks the cc13xx_cc26xx IEEE 802.15.4 driver to use
the TI RF driver API that is available in modules/hal/ti.
There are a number of benefits to using TI's API including
- a stable multi-OS vendor library and API
- API compatibility with the rest of the SimpleLink SDK and SoC family
- potential multi-protocol & multi-client radio operation
(e.g. both 15.4 and BLE)
- coexistence support with other chipsets via gpio
- vetted TI RF driver resources, such as
- the radio command queue
- highly tuned / coupled RTC & RAT (RAdio Timer) API
Fixes#26312
Signed-off-by: Christopher Friedt <chrisfriedt@gmail.com>
In case of h/w setup with multiples device instances it is possible
that some of them wants to use triggers but not the others (no
interrupt line.
Since Kconfig configuration is the same way for all the instances
(CONFIG_LSM6DSL_TRIGGER=y), the driver behaves differently according
to how the device instance has been configured in the DT.
If irq-gpios is present, then the driver initialize the interrupt
part, else it skip irq init and returns ok, but data->gpio != NULL
xis checked in trigger_set() API.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Enable ARR preload so that period or pulse updates are taken
into account synchronously with update event
(at the end of a ongoing period)
And thus avoid undetermined intermediate pulse.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Add support for configuring Ethernet pins using DT pinctrl entries. Note
that F1 series pinctrl support is not handled as the driver does not
support F1.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Channels 4..7 are multiplexed on adc16. The NXP HAL exposes
ADC16_SetChannelMuxMode but this function is not yet included
in Zephy. The following patch adds channel-mux-b to the dts
enabling the use of the alternate channels of 16 bit adc.
Signed-off-by: Andreas Dröscher <github@anticat.ch>
1. Merged the single/multiple ring(s) APIs, now these APIs
can handle both which requires passing a ring id.
2. Updated timestamp handling to match the new timestamp
implementation in the SDK driver.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Those devices can use several I2C address in order to address more
than 256 Bytes using 8bit addressing. Also several physical component
can be used as a contiguous memory.
Signed-off-by: Guillaume Lager <guillaume.lager@gmail.com>
This patch makes the initialization of workqueue earlier
for Nordic driver. Without this change Nordic devices
will fail tests/subsys/usb/device test as it is resetting
USB and by that will try to start already started workqueue
thread. This may lead to Zephyr fatal error.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This driver supports the PWM driven LEDs. The devices are created from
the DT nodes with a compatible property matching "pwm-leds". For each
child node a LED is created and its "pwms" phandle's node is used to
retrieve the PWM configuration: channel, period and flags. If some of
this properties are missing (it is the case for some PWM controllers),
then reasonable default values are used.
This driver implements the following LED API methods:
- led_on
- led_off
- led_blink
- led_set_brightness
Signed-off-by: Simon Guinot <simon.guinot@seagate.com>
With STM32Cube updates
https://github.com/zephyrproject-rtos/hal_stm32/pull/75
'..._hal_rcc.c' and '..._hal_rcc_ex.c' are now systematically
compiled, due to more and more dependencies from HAL IP on rcc.
So USE_STM32_HAL_RCC and USE_STM32_HAL_RCC_EX becomes useless.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
This provides structure for the regulator device hierarchy and a
driver for GPIO-controlled regulators along with its binding.
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
At present this driver only supports SPI. Refactor it so that SPI is
just one of the options. This does not change any functionality.
Signed-off-by: Simon Glass <sjg@chromium.org>
This member holds the SPI bus pointer. Change its name to make that
more obvious and so that it can be used for an I2C bus also.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present there are three separate read functions and two write
functions. This makes it harder to provide an interface that can work
with either SPI or I2C.
Use bmi160_read() for all reads and create a new bmi160_write()
function for all writes.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present this driver only supports a single instance. It sets up some
of its config in the init routine. It is better to put config in
constant data so that multiple instances can be supported and RAM space
is minimised.
Update the driver accordingly.
Signed-off-by: Simon Glass <sjg@chromium.org>
Currently a 'bmi160' pointer is used to point to the driver data. This
confusing, as the driver uses both data and config. Rename the variable
to 'data' like the bme280 driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
This driver uses verbose names for the config and data structures, which
makes it harder to see which one we are talking about. Shorten it, like
the bme280 driver.
Signed-off-by: Simon Glass <sjg@chromium.org>
All net_bufs allocated to modem_cmd_handler's data->rx_buf are consumed
synchronously in ublox-sara-r4.c in the same thread. This means that
allocating them with timeout makes no sense, because timeout
will *always* be hit when there are no more buffers in net_buf_pool.
Get rid of the unnecessary timeout, as it doesn't help and just slows
down processing of incoming data, increasing possibility of data
overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All net_bufs allocated to modem_cmd_handler's data->rx_buf are consumed
synchronously in gsm_ppp.c in the same thread. This means that
allocating them with timeout makes no sense, because timeout
will *always* be hit when there are no more buffers in net_buf_pool.
Get rid of the unnecessary timeout, as it doesn't help and just slows
down processing of incoming data, increasing possibility of data
overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
All net_bufs allocated to modem_cmd_handler's data->rx_buf are consumed
synchronously in esp.c in the same thread. This means that allocating
them with timeout makes no sense, because timeout will *always* be hit
when there are no more buffers in net_buf_pool.
Get rid of the unnecessary timeout, as it doesn't help and just slows
down processing of incoming data, increasing possibility of data
overrun.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far a dedicated buffer was used for data read from modem
interface. New net_bufs were allocated and filled later, which means
that data was lost when no more net_bufs were available in the pool.
Prevent data loss by allocating net_buf before attempting any read on
modem interface. Process incoming data in a loop as long as reading from
interface results in new data. Also remove dedicated buffer
(data->read_buf) and directly fill net_buf content instead. As a side
effect there are less memory copy operations and RAM usage is reduced.
Pre-allocated net_buf is now always appended to data->rx_buf. When there
was no (more) data read from interface to such net_buf, then this empty
net_buf will be on the end of data->rx_buf fragment list. Update
skipcrlf() and findcrlf() implementations to explicitly check for each
net_buf length, instead of blindly assuming them to have at least single
byte.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
cmd_handler_process() does two major things:
- reads data from modem interface and fills data->rx_buf,
- processes data in data->rx_buf.
Split implementation accordingly to two separate functions, which
improves readability (less automatic variables to follow at once) and
simplifies refactoring of each action.
No functional change was intended in this commit.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This is to make the gpio-i2c initialization occur after the GPIO pin
clock initialization.
Signed-off-by: Cassini Zhuang <cassini.zhuang@hansonggroup.com>
z_tick_get returns signed int. Adapt comparision
statement for remaining time computation.
Signed-off-by: Parthiban Nallathambi <parthiban@linumiz.com>
If CONFIG_MODEM_SIM_NUMBERS is 'n' than the data_imei field of struct
modem_context doesn't exist, so add ifdef protection for that case.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Allows the use of pin interrupt and callbacks for pca95xx family
GPIO expander chips with an interrupt line.
Enable config flag and define a gpio pin for the expander interrupt-
line (INT) in devicetree and the driver will accept pin interrupt
configurations for the expander gpio pins.
Level triggering is supported through emulation.
A worker is used to avoid waiting for I2C in ISR.
Example devicetree node:
gpioext0: tca9539@77 {
compatible = "nxp,pca95xx";
label = "GPIO_EXT_0";
reg = <0x77>;
interrupt-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
};
Fixes: #27561
Signed-off-by: Bent Ove Stinessen <bent@norbit.no>
This removes a semaphore unlock in init_spi function
which causes risks of competitive access
Signed-off-by: Clotilde Sattler <clotilde.sattler@stimio.fr>
Align register names with the ones found in the datasheet. It is easier
to follow datasheet if names are the same.
Some other minor enhancements have also been introduced (comments, use
BIT for bit fields...).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
The initial configuration provided for the nrfx_power driver cannot
contain just default values, as that mean that DC/DC converters are
to be disabled, while those converters may be (and they actually are
by default for many boards) enabled through Kconfig.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for interrupt driven MSI-X PVM feature for Viper.
Function mask bit update is tracked with snoop interrupt
and vector mask bit update is tracked with pcie pmon lite
address range access detection interrupt.
Both the interrupts are required to enable this feature.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
drivers: pcie_ep: iproc: move msi/msix functions to a separate
file. This increases readability and modularity.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
File names such as pcie_ep_bcm_iproc.c / pcie_ep_bcm_iproc_regs.h
seem unnecessarily long, same with CONFIG symbols' names.
Let's shorten them by replacing 'bcm_iproc' with simply 'iproc'.
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
Listen func goes through a chain of calls to call winc1500_accept.
This is done to install the accept callback and should not block.
This fixes#28953 where winc1500 driver blocks on listen.
Signed-off-by: Nicolai Glud <nicolai.glud@prevas.dk>
There is no need to involve a work queue to control timeouts in
the uart_nrfx_uart driver. Kernel timers are sufficient for those
tasks, and the uart_nrfx_uarte driver may serve as a proof of this.
Replace then those uses of work queue with timers, for consistency
and simplicity, also to avoid potential issues with cancellation of
the delayed work queue items.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
The TACH_XEC_DATA macro was not using its parameter
to retrieve the data structure.
It was working by chance so far.
Signed-off-by: Philémon Jaermann <p.jaermann@gmail.com>
In #29055, GPIO registers programming order was modified in order
to avoid late glitch generation when programming pins at device
driver init.
The issue had been seen on non F1 device, but it made sense
to be applied on F1 series as well.
After test, it appears that it doesn't and initial F1 code was fine.
New code is generating glitch on I2C bus.
Revert the change for F1 series.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
1, Change the allocation of DMA descriptors for the case
when multiple buffers are used for DMA transfer. This was
tested during SPI DMA transfers
2. Add support for the case when source and destination
addresses should not be incremented.
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
Fix incorrect return value check when converting pinctrl
format to existing pin config format
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
The header scheme for the IPM_CAVS_IDC driver changed and this legacy
platform (which is really a very close cousin of intel_adsp/cavs_v15)
broke. Fix things up. Longer term we should unify the two.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
The SoC definitions have the necessary IPC/IDC bits so there is
no need to define them separately.
Originally-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Significant rework of the Intel Audio DSP SoC/board layers. Includes
code from the following upstream commits:
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Thu Jun 25 16:34:36 2020 +0100
xtesna: adsp: use 50k ticks per sec for audio
Audio needs high resolution scheduling so schedule to nearest 20uS.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 24 13:59:01 2020 -0700
soc/xtensa/intel_adsp: Remove sof-config.h includes
This header isn't used any more, and in any case shouldn't be included
by SoC-layer Zephyr headers that need to be able to build without SOF.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Sat Jun 20 15:42:58 2020 -0700
soc/intel_adsp: Leave interrupts disabled at MP startup
This had some code that was pasted in from esp32 that was inexplicably
enabling interrupts when starting an auxiliary CPU. The original
intent was that the resulting key would be passed down to the OS, but
that's a legacy SMP mechanism and unused. What it actually did was
SET the resulting value in PS.INTLEVEL, enabling interrupts globally
before the CPU is ready to handle them.
Just remove. The system doesn't need to enable interrupts until the
entrance to the first user thread on this CPU, which will do it
automatically as part of the context switch.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 13:57:54 2020 +0300
dts: intel_cavs: Add required label
Add required label fixing build for CAVS15, 20, 25.
Fixes following errors:
...
devicetree error: 'label' is marked as required in 'properties:' in
bindings/interrupt-controller/intel,cavs-intc.yaml,
but does not appear in
...
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 15:19:56 2020 +0300
soc: cavs_v18: Remove dts_fixup and fix build
Remove unused now dts_fixup.h and fix build with the recent code base.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 15:12:25 2020 +0300
soc: cavs_v20: Remove dts_fixup and fix build
Remove unused now dts_fixup.h and fix build with the recent code base.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 23 14:59:23 2020 +0300
soc: cavs_v25: Remove dts_fixup fix build
Remove unused now dts_fixup and fix build with the latest code base.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 12 12:29:06 2020 +0300
soc: intel_adsp: Remove unused functions
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 17:53:58 2020 +0300
soc: intel_adsp: Clean up soc.h
Remove unused or duplicated definitions.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 17:02:23 2020 +0300
soc: intel_adsp: De-duplicate soc.h
Move soc.h to common SOC area.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 15:54:19 2020 +0300
soc: intel_adsp: Remove duplicated io.h
Move duplicated io.h to common SOC area.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 12 12:39:46 2020 +0300
cmake: Correct SOC_SERIES name for byt and bdw
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 12 12:39:02 2020 +0300
soc: intel_adsp: Build bootloader only for specific SOCs
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Thu Jun 11 13:46:25 2020 +0100
boards: xtensa: adsp: add byt and bdw boards WIP
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 10 10:01:29 2020 -0700
soc/intel_adsp: Make the HDA timer the default always
The CAVS_TIMER was originally written because the CCOUNT values are
skewed between SMP CPUs, so it's the default when SMP=y. But really
it should be the default always, the 19.2 MHz timer is plenty fast
enough to be the Zephyr cycle timer, and it's rate is synchronized
across the whole system (including the host CPU), making it a better
choice for timing-sensitive applications.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 15:21:43 2020 +0300
soc: cavs_v25: Enable general samples build
Enables general samples build for SOC cavs_v25.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 15:13:53 2020 +0300
soc: cavs_v20: Enable general samples build
Enable general sample build.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 14:35:13 2020 +0300
soc: cavs_v18: Fix build general samples
Fix building general samples for CAVS18.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 14:22:40 2020 +0300
soc: intel_adsp: Add support for other SOCs
Support other SOCs in the "ready" message to the Host.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 10 13:25:39 2020 +0300
soc: intel_adsp: Move adsp.c to common SOC area
Move adsp.c to common and clean makefiles.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 17:18:18 2020 +0300
boards: intel_adsp: Remove dependency on SOF
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 9 14:29:44 2020 +0100
soc: xtensa: cavs: build now good for cavs20 + 25
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 15:57:01 2020 +0300
soc: cavs_v15: Fix build for hello_world
Fix build for other then audio/sof targets.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 14:50:12 2020 +0300
sample: audio/sof: Remove old overlays
Removing old overlays used to switch logging backend.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon Jun 8 15:02:01 2020 +0300
soc: intel_adsp: Correct TEXT area
Correct HEADER_SPACE and put TEXT to:
(HP_SRAM_WIN0_BASE + HP_SRAM_WIN0_SIZE + VECTOR_TBL_SIZE)
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 14:44:47 2020 +0300
soc: intel_adsp: Trivial syntax cleanup
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 14:41:07 2020 +0300
soc: intel_adsp: Fix bootloader script path
Make it possible to find linker script if build is done not inside
ZEPHYR_BASE.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 9 12:10:17 2020 +0100
soc: xtensa: cavs20/25: fix build with new headers - WIP
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 9 13:35:38 2020 +0300
soc: intel_adsp: Fix include headers
Fixes include headers
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 9 10:38:50 2020 +0100
soc: xtensa: cav18: updated headers- WIP
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Fri May 1 15:29:26 2020 -0700
soc/xtensa/intel_adsp: Clean up MP config logic
CONFIG_MP_NUM_CPUS is a platform value, indicating the number of CPUs
for which the Zephyr image is built. This is the value kernel and
device code should use to predicate questions like "is there more than
one CPU?"
CONFIG_SMP is an application tunable, controlling whether or not the
kernel schedules threads on CPUs other than the first one. This is
orthogonal to MP_NUM_CPUS: it's possible to build a "SMP" kernel on a
uniprocessor system or have a UP kernel on a MP system if the other
cores are used for non-thread application code.
CONFIG_SCHED_IPI_SUPPORTED is a platform flag telling an SMP kernel
whether or not it can synchronously signal other CPUs of scheduler
state changes. It should be inspected only inside the scheduler (or
other code that uses the API). This should be selected in kconfig by
soc layer code, or by a driver that implements the feature.
CONFIG_IPM_CAVS_IDC is a driver required to implement IPI on this
platform. This is what we should use as a predicate if we have
dependence on the IPM driver for a platform feature.
These were all being sort of borged together in code. Split them up
correctly, allowing the platform MP layer to be unit tested in the
absence of SMP (c.f. tests/kernel/mp), and SMP kernels with only one
CPU (which is pathlogical in practice, but also a very good unit test)
to be built.
Also removes some dead linker code for SMP-related sections that don't
exist in Zephyr.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Jun 8 16:41:55 2020 +0100
soc: xtensa: bootloader - use linker script
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Jun 8 16:26:18 2020 +0100
soc: xtensa: further fix headers - WIP
Simplify the directory structure, WIP for cavs20 and cavs25
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon Jun 8 12:59:30 2020 +0300
soc: cavs_v15: Remove unneeded include
Remove include fixing build.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun Jun 7 12:37:35 2020 +0100
soc:xtensa: adsp: remove sof specific code from soc headers
TODO: v1.8+
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Marc Herbert <marc.herbert@intel.com>
Date: Thu Jun 4 23:19:37 2020 -0700
intel_adsp_*/doc: fix duplicate .rst labels
Quick fix purely to make the build green again.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Author: Marc Herbert <marc.herbert@intel.com>
Date: Thu Jun 4 22:34:40 2020 -0700
samples/audio/sof: use OVERLAY_CONFIG to import apollolake_defconfig
This reverts commit 21f16b5b1d29fca83d1b62b1b75683b5a1bc2935 that
copied it here instead.
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri Jun 5 12:34:48 2020 +0300
soc: intel_adsp: Move soc_mp to common
Moving soc_mp to common SOC area, it still needs fixes for taking
number of cores from Zephyr Kconfig, etc.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 16:05:06 2020 +0300
soc: intel_adsp: Move memory.h from lib/
For those files from SOF referencing platform/lib/memory.h we have
include.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 15:20:09 2020 +0300
soc: intel_adsp: Rename platform.h to soc.h
Rename to prevent including it from SOF.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 11:47:55 2020 +0300
soc: intel_adsp: Move headers
Move headers to more convenient place
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Jun 4 11:21:51 2020 +0300
soc: intel_adsp: More SOC cleaning
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Marc Herbert <marc.herbert@intel.com>
Date: Mon Jun 1 15:31:34 2020 -0700
samples/audio/sof: import sof/src/arch/xtensa/ apollolake_defconfig
Import modules/audio/sof/src/arch/xtensa/configs/apollolake_defconfig
into prj.conf and new boards/up_squared_adsp.conf
Signed-off-by: Marc Herbert <marc.herbert@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 15:07:40 2020 +0100
soc:xtensa: adsp: let SOF configure the DSP for audio
Let SOF do this for the moment.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 15:06:20 2020 +0100
soc: xtensa: cavs: remove headers similar to cavs15
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 3 15:58:38 2020 +0300
soc: intel_adsp: Move ipc header to common
Remove duplicated headers from CAVS to common SOC part
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Jun 3 13:02:09 2020 +0300
soc: cavs_v15: Remove unneeded headers
Remove also from CAVS15.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 18:34:11 2020 +0300
Remove more headers
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 14:12:09 2020 +0100
soc: xtensa: remove cavs sod headers for drivers and trace.
Duplicate cavs15 headers.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Jun 3 14:05:12 2020 +0100
samples: move sof dai, dma and clk configs to SOF
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 17:38:45 2020 +0300
soc: intel_adsp: Remove more duplicated headers
Remove more headers
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue Jun 2 15:50:03 2020 +0100
samples: sof: remove pm realted files.
Use the SOF versions.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 16:55:40 2020 +0300
WIP: Strip lib from include path
WIP, pushed for sync
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 14:44:33 2020 +0300
soc: intel_adsp: Remove more headers
Remove even more common headers
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Jun 2 14:00:47 2020 +0300
soc: intel_adsp: Remove SOF headers
The headers would be used by audio/sof app directly from SOF module.
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Sat May 30 11:01:26 2020 -0700
soc/intel_adsp: Alternative log reading script
This script speaks the same protocol and works with the same firmware,
but:
* Is a single file with no dependencies outside the python3 standard
library and can be run out-of-tree (i.e. with setups where the
firmware is not built on the device under test)
* Operates in "tail" mode, where it will continue polling for more
output, making it easier to watch a running process and acting more
like a conventional console device.
* Has no dependence on the diag_driver kernel module (it reads the DSP
SRAM memory directly from the BAR mapping in the PCI device)
* Is MUCH smaller than the existing tool.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu May 28 16:17:51 2020 +0300
Decrease HEP pool size to 192000
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:27:00 2020 +0100
soc: xtensa: cavs25: complete support for cavs25
Builds, not tested on qmeu due to missing SOF ROM (TODO)
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:24:26 2020 +0100
soc: xtensa: cavs20: complete cavs20 support
Now boots on qemu.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:22:13 2020 +0100
soc: xtensa: cavs18: complete boot support
Now boots on qemu.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:19:23 2020 +0100
soc: xtensa: cavs15: use cavs15 instead of apl as linker soc name
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 29 10:16:06 2020 +0100
TODO: samples: sof: work around missing trace symbols.
Disable local trace.
Needs trace updates finished before this can be removed.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:57:19 2020 +0100
dts: xtensa: rename apl to cavs15 DTS
This DTS is used by more than APL SOC. i.e. all CAVS15 SOCs
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:52:20 2020 +0100
west: commands: sign: Add signing support for other CAVS targets
Sign for CAVS15, CAVS18, CAVS20 and CAVS25 SOCs
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:50:07 2020 +0100
boards: xtensa: cavs: used Zephyr mask macro
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed May 27 15:49:46 2020 +0100
soc: xtensa: move code to SOF
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue May 26 11:40:36 2020 +0100
soc: xtensa: use SOF versions of clk
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 18:38:45 2020 +0300
soc: intel_adsp: Send FW ready for non SOF configuration
Configure windows and send FW ready when used without SOF, should be
loaded with fw_loader script.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 18:02:22 2020 +0300
soc: intel_adsp: Use SOF version of the file
Use exact copy from SOF module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:47:27 2020 +0300
soc: intel_adsp: Clean up include headers
Remove SOF mentions from the SOC headers.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:43:05 2020 +0300
soc: intel_adsp: Move SOF specific code to samples/audio/sof
Move SOF specific code to the SOF sample.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:39:42 2020 +0300
soc: intel_adsp: Use SOF module's version of mem_window.c
Use exact copy from SOF module.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 17:36:41 2020 +0300
soc: intel_adsp: Use exact copy from SOF module
Use SOF module verion of the clk.c
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 25 14:03:35 2020 +0300
soc: xtensa: Add {SOC_FAMILY}/common/include path
Add ${SOC_DIR}/${ARCH}/${SOC_FAMILY}/common/include path if exist.
Fixes issues for xtensa SOCs.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 25 16:18:50 2020 +0100
soc: xtensa: cavs common: fix headers for build
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 25 16:10:57 2020 +0100
soc: xtensa: adsp: add so_inthandlers.h for Intel platforms
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 25 16:08:26 2020 +0100
cmake: xtensa: select correct compiler per CAVS target.
TODO: what about XCC ?
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue May 19 14:59:26 2020 +0300
boards: up_squared_adsp: Move SOF configuration to samples
Move SOF-specific configuration to samples/audio/sof prj.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri May 15 15:29:50 2020 +0300
soc: intel_adsp: Move SOF code to modules/audio/sof
Move SOF dependent code out of SOC area.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu May 14 17:30:38 2020 +0300
Move task_main_start() to audio/sof sample
Start task_main_start() from main of audio/sof sample.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed May 13 15:37:20 2020 +0300
Rename up_xtreme_adsp to intel_adsp_cavs18
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon Apr 27 14:12:59 2020 +0300
Add sample audio/sof for SOF initialization
Add dedicated sample where we put SOF specific initialization.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 11 18:49:36 2020 +0300
WIP: soc: cavs_v18: Cleanup
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 11 15:44:06 2020 +0300
soc: cavs_v15: Move soc init to common part
Moving SOC init to the right place.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Mon May 11 15:02:28 2020 +0300
soc: intel_adsp: Move common part to special dir
Moving common part to common/adsp.c
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Fri May 8 14:37:50 2020 +0300
boards: up_xtreme_adsp: Add initial up_xtreme_adsp board
Add initial board copying existing up_squared_adsp board and using
CAVS1.8 SOC family.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu May 7 15:30:51 2020 +0300
soc: intel_adsp: Generalize bootloader
Move bootloader to soc/xtensa/intel_adsp making it available for other
boards.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue May 5 21:31:00 2020 +0100
boards: xtensa: up_squared: Add support for all CAVS
Add boot support for all CAVS versions. TODO: needs to be made common
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Tue May 5 21:25:34 2020 +0100
soc: xtensa: intel_adsp: Manage cache for DMA descriptors
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 4 21:10:50 2020 +0100
soc: xtensa: adsp: use 24M567 clock
Use audio clock
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon May 4 10:04:01 2020 +0100
xtensa: soc: adsp: enable system agent
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 15:03:07 2020 +0100
soc: xtensa: intel_adsp: increase mem pool to 192k
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 15:02:31 2020 +0100
soc: xtensa: intel_adsp: re-enable DMA trace
Buffer will be empty (as trace items sent to Zephyr LOG) but
logic is running.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 11:18:55 2020 +0100
soc: xtensa: intel: dont use uncache region yet.
Some code was still using this region. Use later.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun May 3 10:07:28 2020 +0100
soc: xtensa: intel_adsp: fix notifier init
Topology now loads.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 1 21:18:38 2020 +0100
boards: up2: Need to use sof config for bootloader
This will need uncoupled at some point. For testing today.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 1 21:16:38 2020 +0100
boards: up2: increase heap to 128k
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Apr 30 11:35:19 2020 +0300
boards: up_squared_adsp: Use bigger HEAP
Use HEAP from old demo.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri May 1 16:06:32 2020 +0100
soc: xtensa: intel_adsp: Fix config.h naming collisions
Rename sof version to sof-config.h
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Thu Apr 30 11:22:42 2020 +0300
Small cleanups
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 29 22:00:44 2020 +0300
tests: sof/audio: Test ll scheduler
Add more tests for scheduler.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 29 18:38:35 2020 +0300
tests: Add first schedule test
Add initial test for testing scheduling.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 29 13:36:23 2020 +0100
soc: xtensa: rmeove build warnings
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 28 18:04:33 2020 +0300
soc/intel_adsp: Register sof logging
Register sof logging for tracing
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 28 14:16:55 2020 +0300
boards: up_squared_adsp: Define HEAP_MEM_POOL_SIZE
Define HEAP_MEM_POOL_SIZE when SOF enabled.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 28 10:09:20 2020 +0300
tests: audio/sof: Add interrupt API for testing
Add initial interrupt API for testing.
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 27 15:54:28 2020 +0100
soc: xtensa: adsp: Update linker script for SOF sections.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 27 11:20:01 2020 +0100
soc: xtensa: adsp: send SOF FW metadata as boot message
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun Apr 26 21:47:20 2020 +0100
soc: xtensa: adsp: re-enable all SOF IP init.
Do all SOF IP init.
TODO: ATOMCTL, WFI on LX6
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sat Apr 25 15:30:40 2020 +0100
soc: xtensa: irq: Make sure IPC IRQ is registered.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 22 20:56:09 2020 +0300
tests: sof: Enable console
Enable console for the test.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 22 17:57:22 2020 +0300
soc: cavs_v15: Fix XTENSA_KERNEL_CPU_PTR_SR
Use correct value for XTENSA_KERNEL_CPU_PTR_SR.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Wed Apr 22 14:48:31 2020 +0300
tests: audio/sof: Add tests for alloc API testing
Add initial tests for allocation API testing. Can be extended for
other later.
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 21 17:49:32 2020 +0300
logging: Enable xtensa simulator backend for ADSP
Enable xtensa simulator backend for SOC_FAMILY_INTEL_ADSP.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 20:58:30 2020 +0100
soc: xtensa: add common cpu logic
Support for additional cores.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Date: Tue Apr 21 10:11:07 2020 +0300
Update west.yaml to point to the latest repo
Update west.yaml
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:17:01 2020 +0100
soc: xtensa: cavs: Fix build for clk.c on cavs18+
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:05:31 2020 +0100
soc: xtensa: cavs15: removed unused headers.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:05:09 2020 +0100
soc: xtensa: cavs25: align with SOF headers
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:03:52 2020 +0100
soc: xtensa: cavs20: align with SOF headers
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 16:03:09 2020 +0100
soc: xtensa: cavs18: Align with SOF headers.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Apr 20 11:42:39 2020 +0100
west: sof: Updated to latest version.
Now builds, links and runs SOF code (but not to FW ready).
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Sun Apr 19 13:28:53 2020 +0100
xtensa: intel adsp: build in SOF symbols if CONFIG_SOF
Code now fully links against SOF. Needs to be run tested.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Wed Apr 15 10:19:28 2020 -0700
DO NOT MERGE: temporarily add thesoftproject as remote for sof module
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Wed Apr 15 10:33:40 2020 -0700
ipm: cavs_idc: use the IPC/IDC definitions in SoC
The SoC definitions have the necessary IPC/IDC bits so there is
no need to define them separately.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 14:30:20 2020 +0100
TODO: config: Use static config for SOF module.
TODO: needs to be generated as part of SOF kconfig
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Fri Apr 10 21:56:07 2020 +0100
HACK: Add SOF into build
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 13:55:15 2020 +0100
west: modules: Add SOF audio module.
Add support for building SOF as a Zephyr module. This is the starting
point for add SOF audio into Zephyr. Currently builds but does not use
any symbols yet.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 13:48:48 2020 +0100
WIP soc: adsp-cavs15: Use same include directory structure as SOF
Use the same directory structure as SOF to simplify porting and allow
SOF to build without Zephyr until porting work is complete.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Apr 15 13:43:44 2020 +0100
WIP soc: adsp-common: Use same include directory structure as SOF
Use the same directory structure as SOF to simplify porting and allow
SOF to build without Zephyr until porting work is complete.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 14:36:32 2020 +0000
WIP: soc: adsp-common: cache is common across all Intel ADSP platforms
De-duplicate soc.h cache definitions.
TODO: this needs done for other common functions.
TODO: need to fix include path
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 30 11:07:43 2020 -0700
WIP: soc: cavs25: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 30 11:07:12 2020 -0700
WIP: soc: cavs20: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 30 11:06:40 2020 -0700
WIP: soc: cavs18: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 12:37:17 2020 -0700
soc: intel_adsp: use main_entry.S in common for cavs_v15
The files are identical anyway.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 11:38:14 2020 -0700
soc: intel_adsp/cavs_v15: link common code
Let cavs_v15 link against the code compiled under common/.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 13:08:28 2020 +0000
WIP: soc: common: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 14:37:32 2020 +0000
WIP soc: adsp-cavs15: build power down support
Build the power down support for CAVS1.5
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 12:40:17 2020 +0000
WIP: soc: cavs15: Import SOF SoC support
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 16 14:30:08 2020 +0000
soc: cavs15: Add missing SHIM registers.
SOF commit 2746df76b98f21d3e0b2c5cd4fe405c9a42014a4
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Mon Mar 9 15:43:01 2020 +0000
xtensa: intel_adsp/cavs_v15: fix usage of LP SRAM power gating
Remove LSPGCTL as it can cause confusion, use SHIM_LSPGCTL instead.
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Date: Wed Feb 26 15:28:48 2020 +0000
boards: up_squared_adsp: Use local xtensa HAL instead of SDK HAL
SDK HAL is deprecated for Intel ADSP SoCs so fix and use local HAL
module.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Signed-off-by: Liam Girdwood <liam.r.girdwood@linux.intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 10:45:15 2020 -0700
soc: add Intel Audio DSP SoC family
This creates a SoC family for the audio DSPs on various
Intel CPUs. The intel_apl_adsp is being moved into
this family as well, since it is part of the CAVS v1.5
series of DSPs.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Daniel Leung <daniel.leung@intel.com>
Date: Mon Mar 30 11:29:02 2020 -0700
soc: xtensa: add CMakeLists.txt
Add CMakeLists.txt under soc/xtensa so that CMakeLists.txt
inside each SoC directory will be included, similar to
what ARM and RISCV have.
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 17 12:30:43 2020 -0700
Revert "boards: up_squared_adsp: Add flasher script"
This reverts commit 80f295a9dd.
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 17 12:30:32 2020 -0700
Revert "boards: up_squared_adsp: Update logtool tool"
This reverts commit 7770d182c1.
Author: Andy Ross <andrew.j.ross@intel.com>
Date: Wed Jun 17 12:30:23 2020 -0700
Revert "soc: intel_adsp: Generalize bootloader"
This reverts commit d6a33ef467.
Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
soc: xtensa; intel: remove sof-config.h - SQUASH
No longer used.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
The HDA wall clock timer is a 64 bit timer with 64 bit compare
registers, but it's being used from a 32 bit CPU. Writing the
comparator piecewise with a 64 bit C assignment will write the low
dword first, opening the possibility that the hardware will see time
go "backwards" and trigger an interrupt incorrectly.
Disable the enable bit while setting the comparator.
Found by inspection. In practice this will be very rare, and spurious
timer interrupts are supposed to be benign anyway (though they can
result in timeout expirations being misaligned to ticks, which might
be surprising to applications). Best to get it right.
Signed-off-by: Andy Ross <andrew.j.ross@intel.com>
If other threads are accessing the modem concurrently during gsm_ppp
initialization, they can easily corrupt UART comms. Normally this is not
noticable since those services are usually started only after modem
setup has been completed. But with the new gsm_ppp stop/start
functionality, the need of synchronizing concurrent access in a
structured way has arisen.
This commit ensures modem_cmd_handler is locked when concurrent access
to the modem UART would interfere with the driver, or otherwise cause
problems. Since the semaphore is not available during this period, all
essential calls to modem_cmd_send has been replaced with the non-locking
equivalents.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
A semaphore is used by modem_cmd_handler to protect against concurrent
UART access. This is only used for the duration of sending a command,
but there are cases when one wants to prevent UART access for other
reasons, such as when powering off the modem.
This commit exposes functionality for hogging this semaphore without
having to send a command. Furthermore, a non-locking equivalent for
modem_cmd_handler_setup_cmds is added which was previously missing.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
The parameters of the associated PWM timer were not being picked up
properly, as it was assumed that parent index is the same as the child
index. This is not necessarily true if other timer nodes are active and
not being used for PWM.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
CAN remaps were guarded by CMSIS defines which are always defined
for a given SoC.
Though under this control, we're using DT_ macros that expect
a certain node to be available, which otherwise leads to cmopilation
issue.
Align CAN node remap code on other peripherals code and check for
node availability.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Set stm32_dt_pinctrl_configure function as the unique entry point
to STM32 DT pinctrl management.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Move pinctrl remap functions out of stm32f1 definition in order
to get it available to all series.
Allows use of more IS_ENABLED macros in calling drivers and make
code more readable.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Add power-gpios device-tree binding property to power on module before
communicating with it. This pin is called CHIP_PU in case of ESP32{,-S2}
and CHIP_EN in case of ESP8266. Dedicated reset pin is available only on
the latter, however Espressif recommends (in ESP8266 Hardware Design
Guidelines) to use CHIP_EN instead. Follow those recommendations and use
power-gpios to reset chip if that is provided over device-tree.
Configure power-gpios and reset-gpios as inactive by default, so that
chip becomes ready after executing esp_reset() function, either if one
or both are provided over device-tree.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Most DT bindings use reset-gpios name when there is a pin to reset whole
chip. Rename wifi-reset-gpios to reset-gpios to be more consistent
between various drivers. Additionally this prevents confusion, as
somebody might think that this pin resets only WiFi, which is not true.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Remove two operation flags in the SPI configuration
instance, which disturb software controlled chip select
lines (CS never gets released).
Signed-off-by: Marco Peter <marco@peter-net.ch>
Application might need to know the GSM modem device name so
provide it in the header file.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
When PPP is muxed, using uart_poll_out resulted in each byte getting
wrapped in a muxing header. This led to UART bombardment which
can quickly cause some modems to hang and panic. This was observed
regularly using a SIMCOM7600E modem.
A perfect fix would involve rewriting ppp.c, uart_mux.c and
modem_iface_uart.c to all use another UART API, but that would be more
invasive by several orders of magnitude than this one, which utilizes
the fact that the uart_mux implementation of uart_fifo_fill does NOT
require ISR context. Since the Zephyr UART API states that the behavior
of uart_fifo_fill outside of ISR context is implementation defined, this
should be kosher.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
These changes enable applications to restart the networking stack which
was previously not possible without rebooting the device. This was a
major show-stopper because it made power management impossible, and
furthermore made it impossible to recover from a bad modem state without
rebooting.
This has been verified to work on a SIMCOM7600E modem, both with and
without CONFIG_GSM_MUX enabled.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
The char pointer that is logged could get scoped out and so should be
strduped before logging.
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
Thread implements couple of counters that require notification of failed
frame reception.
Implemented RX failed notification.
Signed-off-by: Marek Porwisz <marek.porwisz@nordicsemi.no>
Attempting to initialize PPP without first ensuring we're attached to
the network packet service will sometimes lead to "NO CARRIER" errors
when we initialize PPP with the modem. This has been observed
reproducibly on some SIMCOM7600E modems.
This commit holds off on PPP initialization until modem has reported
that it is indeed attached by using the "AT+CGATT?" command (see 3GPP TS
27.007)
Signed-off-by: Benjamin Lindqvist <benjamin.lindqvist@endian.se>
The only user of the I2C instances is the esp32 driver. Move the
Kconfig symbols down to the esp32 Kconfig for the instances it needs.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
A GPIO's parallel output bit in the parallel output
registers is read-only until the AOD bit is set to 1
in the pin's control registers. The proper sequence to
preset the state of an output pin is:
Configure pin as input with AOD=1 in the control register
Set pin state in the parallel output register
Set direction to output in the pin's control register.
Signed-off-by: Scott Worley <scott.worley@microchip.com>
The IIS2ICLX is a high-accuracy. ultra-low noise, low-power
two-axis linear accelerometer which can be interfaced through
either I2C or SPI bus.
Its high accuracy, stability over temperature and repeatability
make IIS2ICLX particularly suitable for inclination measurement
for industrial applications (inclinometers).
https://www.st.com/resource/en/datasheet/iis2iclx.pdf
This driver is based on stmemsc i/f v1.03.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Moved enabling SPI peripheral in front of the buffers loop.
Removed SPI DMA switching on in front of the buffers loop.
Signed-off-by: Łukasz Mazur <lukasz.mazur@hidglobal.com>
Removed SPI peripheral disabling when switching DMA to another buffer.
When using hardware chip select this would cause to stop driving
CS pin when swhitching buffers. This is different (and wrong) than
when used software CS.
Fixes#28833
Signed-off-by: Łukasz Mazur <lukasz.mazur@hidglobal.com>
Have the driver default to UART_CFG_PARITY_NONE if no parity property
exists rather than using default in binding.
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Fixes gpio_mcux_lpc_port_set_masked_raw function inside gpio_mcux_lpc
driver. Writing masked data is correctly done using device registers.
Signed-off-by: Andrei Gansari <andrei.gansari@nxp.com>
ADC shell commands can be only executed on the property label
existing in the device tree. It is realized by the dynamic subcommand
returning existing ADC Label.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
The channel command has been extended with subcommands: id, positive,
and negetive. Some boards require positive input configuration before
measurement can be started.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Use dedicated shell macros so argument count can be validated before
the command handler is executed. This change simplifies the command
handlers implementation inside the adc_shell file.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
Changed gain and reference commands to dictionary commands.
This change removes an obsolete look-up table (string <-> value)
for gain and reference commands.
Now, each modification of gain or reference value will require only
a dictionary command update.
Signed-off-by: Jakub Rzeszutko <jakub.rzeszutko@nordicsemi.no>
'remap' value can never be REMAP_FULL for usart.
Fix this value depending on the usart instance.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Stable API change: modify parameters of clock_control_async_on which
previously took a structure which contains list node, callback and user
context. Removing list node and replacing structure with two parameters:
callback and user context. List node is removed because it has no use
in current API.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Refactoring poll_out to be ready for handling preemption. uart_tx and
uart_fifo_fill modified so they are resilient to being preempted by
uart_poll_out.
Refactored uart_poll_out implementation to be common for interrupt
driven API and asynchronous API. In both APIs active state is detected
by evaluating state of ENDTX and TXSTOPPED events. If anyone is set it
means that new transfer can be started.
Patch is fixing existing issues:
- potential bytes dropping with flow control enabled
- busywaiting for ENDTX (asynchronous API) - poor performance
- potential bytes dropping during preemption
- potential uart_tx returning -EBUSY when interrupted poll_out
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
If neither a random address nor a specific local address is in the
device tree, then use the MAC address from the device information page.
Signed-off-by: Thorvald Natvig <thorvald@natvig.com>
Align all sensor drivers that are using stmemsc (STdC) HAL i/f
to new APIs of stmemsc v1.03.
Requires https://github.com/zephyrproject-rtos/hal_st/pull/5
(merged as b52fdbf4b62439be9fab9bb4bae9690a42d2fb14)
Signed-off-by: Armando Visconti <armando.visconti@st.com>
The interrupt enabling routine was called before the
chip enabling routine resulting in a runtime failure
when triggers are set.
Signed-off-by: Armando Visconti <armando.visconti@st.com>
This CL fixed the wrong comparison during searching the vw signal
that issued interrupt from MIWU in espi_vw_generic_isr().
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In order to be in line with other DT_INST macros in zephyr code base,
swap the arguments order in following macro definitions:
*ST_STM32_DT_PINCTRL
*ST_STM32_DT_INST_PINCTRL
Update the users accordingly.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Convert driver to pcintrl configuration using pcintrl helper
macros.
Pinctrl init sequence has to be done before bus_mutex initialization.
Driver dts bindings are updated to reflect usage of pinctrl-x
properties
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Current set of helpers provided for STM32 pinctrl devicetree are
using device instance as input.
In order to prepare for next version that will take node identifier
as input, change existing set of macros using _INST_ namespace.
Additionally rename NODE_ID_FROM_PINCTRL to
ST_STM32_DT_INST_NODE_ID_FROM_PINCTRL.
Finally update existing macros users to this new name scheme.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
During implementation of i2c pinctrl configuration within i2c driver,
it appears that current order of register configuration used to
generate a spike on I2C bus, leading to broken configuration with
I2C device.
Reverse the order so that pin mode setting is done only after pupd,
speed and type are set, in order to avoid generating unwanted
artefacts on the bus.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Do not override OUI of the local MAC address in the devicetree.
Simplify the mac address assignment conditions. Each interface has
its own function. Code duplication will be eliminated with the
use of DT_INST_FOREACH_STATUS_OKAY in a later commit to completely
remove duplicated code.
The 3 possible MAC address assignment (local, random and unique)
are covered and have been tested.
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
This fixes wrong value for i.MX RT.
This is one less hard-coded value in eth_N_context structures.
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
This allows setting the MAC address at run time.
Signed-off-by: Antoine Zen-Ruffinen <antoine@riedonetworks.com>
Signed-off-by: Armand Ciejak <armand@riedonetworks.com>
The PLL Q divisor does not exist on stm32g0X0 variants. It should only
be configured for g0X1 variants.
Signed-off-by: Eric Hay <EHay@sierrawireless.com>
CheckRfFrequency was not assigned correctly to the Radio. This lead
to the system hang when the loramac library tries to call a relevant
Radio method when processing a join-accept message
Signed-off-by: Kuba Sanak <contact@kuba.fyi>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
For preparing the radio drivers (specifically SX1276) for LoRaWAN
support, let's add missing function definitions and callbacks required
by the stack.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Since TimerIrqHandler() API does SPI transactions, it is not advised to
call from an IRQ context. Hence, offload it to a work queue.
Reported-by: Andreas Sandberg <andreas@sandberg.pp.se>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
The loramac-node library definition will also be created by
'subsys/lorawan' for the LoRaWAN support. Hence, just add the source
files if the previous declaration of the library is found else create
a new one.
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Now that Zephyr names have been made short and nice the need of these
helpers is less justified.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Add const modifier for hal instances, clock devices pointer, and module
base address in npcx drivers to prevent driver functions change them
unexpectedly.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, there're 8 Pulse Width Modulator (PWM) modules and each
one support generating a single 16-bit PWM output. A 16-bit clock
prescaler (PRSCn) and a 16-bit counter (CTRn) determine the cycle time,
the minimal possible pulse width, and the duty-cycle steps.
Beside introducing pwm driver for Nuvoton NPCX series, this CL also
includes:
1. Add PWM device tree declarations.
2. Zephyr PWM api implementation.
3. Add aliases in npcx7m6fb_evb board device tree file for supporting
samples/basic/blinky_pwm application and pwm test suites
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Make sure remap is disabled when not requested.
This should have no impact on current cases but is important
when dynamic pin configuration will be used.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
There are cases where the socket would not be closed.
offload_put function will now always close the socket
properly.
Remove error log messages as they are redundant.
on_cmd_sock_error_code handles printing errors.
Signed-off-by: Ryan Erickson <ryan.erickson@lairdconnect.com>
This part of common code for ADC drivers, the adc_context_enable_timer()
function, was still converting sampling interval values to milliseconds
(the only option available at the time this code has been created) when
setting up the kernel timer, consequently limiting the maximum sampling
frequency to 1000 samples per second. This patch switches the routine
to specifying the interval in microseconds, to remove this limitation.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
This emulator supports enable functionality to start up the device and
read a few samples. It connects itself to any BMI160 device it finds in
the device tree. The SPI emulation controller driver is used to direct
SPI messages from the BMI160 driver to the BMI160 emulator.
Add a few more definitions to the header file, as needed.
Signed-off-by: Simon Glass <sjg@chromium.org>
Add an emulation controller which routes SPI traffic to an attached
emulator. Only one emulator is supported per bus at present, since
chip-selction functionality is not present.
This allows drivers for SPI peripherals to be tested on systems that
don't have that peripheral attached, with the emulator handling the SPI
traffic.
Signed-off-by: Simon Glass <sjg@chromium.org>
At present register access is a mix of constants and open-coded values
in the driver. Add a few more constants to clean this up.
Signed-off-by: Simon Glass <sjg@chromium.org>
If HW flow control is enabled, then modem_context framework won't drain
UART FIFO blindly, but will stop when there is no more space in RX
ring_buf. This prevents data loss by "pausing" incoming data on hardware
level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
If HW flow control is enabled, then modem_context framework won't drain
UART FIFO blindly, but will stop when there is no more space in RX
ring_buf. This prevents data loss by "pausing" incoming data on hardware
level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
So far all received bytes over UART where blindly drained and pushed to
ring_buf. This approach is okay for UART devices without configured HW
flow control, as it basically decouples data processing from ISR handler
and gives more time before data overrun. However when HW flow control
is enabled, such behavior somehow suppresses UART flow control
advantage, because data can overrun when pushing to ring_buf.
Allow drivers utilizing modem_context framework to pass information
about whether HW flow control is enabled or not. If it is enabled, then
read data from UART FIFO to the point when RX ring_buf is totally filled
and follow such situation by disabling RX interrupt. Incoming data will
be paused on HW level, so there is lots of time for RX thread to process
ring_buf content. Reenable RX interrupts after all data in ring_buf is
processed, so that number of context switches is kept at minimum level.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
This API allows to drop use of preallocated isr_buf. Most importantly as
a result RAM usage is reduced for each driver utilizing modem_context
framework. Additionally there is less copying done in ISR context, as
data is direcly read from UART FIFO to ring_buf.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Restore the flash write proectction after disabling it for
flash write and erase shell commands.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
Flash drivers are free to re-enable write protection after a write or
erase operation is complete. Therefore write protection has to be
disabled before any such operation.
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
The second argument of this foonction is a bool, so passing 0 and 1
is incorrect.
Coccinelle script:
@@
expression e;
@@
flash_write_protection_set(e,
(
- 0
+ false
|
- 1
+ true
)
)
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
1. clock: move the call for MSI hardware auto calibration enabling
before the control of MSI enable to ensure its execution in all
cases.
2. counter: add call for MSI hardware auto calibration enabling after
the LSE enabling and after possible backup domain reset that may
clear MSIPLLEN.
Signed-off-by: Giancarlo Stasi <giancarlo.stasi.co@gmail.com>
Described in ES096 2.14.7,
F101X8/B, F102X8/B, and F103X8/B
might not be able to enter i2c master mode on power-up.
Force reset help to mitigate this issue.
Signed-off-by: Yiyu Zhu <smallzzy@outlook.com>
Replace all calls to the assert macro that comes from libc by calls to
__ASSERT_NO_MSG(). This is usefull as the former might be different
depending on the libc used and the later can be customized to reduce
flash footprint.
Signed-off-by: Xavier Chapron <xavier.chapron@stimio.fr>
This adapts the driver to changes in the LiteX CSR accessors API
introduced in the previous commit.
Signed-off-by: Pawel Czarnecki <pczarnecki@internships.antmicro.com>
Signed-off-by: Mateusz Holenko <mholenko@antmicro.com>
This change allows to use SSD1306 based displays to be used on the
SPI bus as well.
Adding SPI shield.
Tested on SSD1306 and SSD1309 based displays using I2C.
Tested on SSD1309 based display using SPI.
Signed-off-by: Marco Peter <marco@peter-net.ch>
This change removes the interleaving control
frames.
Additionally all I2C accesses are centralized in
one single function.
Signed-off-by: Marco Peter <marco@peter-net.ch>
This CL adds more comments for each macro functions used for device tree
file for better explanations. It also changes all hex values in soc.c to
lower case.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This CL contains the drivers of NPCX Host Sub-Modules that serve as an
interface between the Host and Core domains. For most of them, the Host
can configure these modules via eSPI(Peripheral Channel)/LPC by
accessing 'Configuration and Control register Set' which IO base address
is 0x4E as default. And the interrupts in core domain help handling any
events from host side.
In this commit, we introduced six host sub-modules. It includes:
1. Keyboard and Mouse Controller (KBC) interface.
2. Power Management (PM) channels.
3. Shared Memory mechanism (SHM).
4. Core Access to Host Modules (C2H).
5. Mobile System Wake-Up functions (MSWC).
6. Serial Port (Legacy UART)
The tasks in application layer such as 8042, ACPI and host command can
cooperation with this driver by connecting api or callback functions.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
In npcx7 series, all of them support the Intel Enhanced Serial
Peripheral Interface (eSPI) Revision 1.0. This specification provides a
path for migrating host sub-devices via LPC to a lower pin count, higher
bandwidth bus. In addition to Host communication via the peripheral
channel, it provides virtual wires support, out-of-band communication,
and device mastering option over the Chipset SPI flash.
Becisdes introducing eSPI device in npcx7, this CL also includes:
1. Add eSPI device tree declarations.
2. Add npcx7-espi-vws-map.dtsi to present the relationship between eSPI
Virtual-Wire signals, eSPI registers, and wake-up input sources.
3. Zephyr eSPI api implementation.
4, Add OOB (Out of Band tunneled SMBus) support.
5. Add configuration files for eSPI test suites.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
Fixed build error in in eSPI socketpair test suite since wrong function
name for eSPI flash channel api.
This CL also fixed [-Werror=unused-function] warning by adding inline
attribute in case someone includes "espi_utils.h" and doesn't call
espi_manage_callback() function.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
The power draw of this magnetometer is significant,
device power management is needed for our use-cases.
Signed-off-by: Emil Hammarstrom <emil.hammarstrom@assaabloy.com>
Change-Id: I71158e629e93b491c6d673aa81001b7a7099f654
On stm32f1 series, device pinctrl configuration could be modified
thanks to remapping capability.
Remapping allows to provide alternate pinctrl configuration to a
peripheral device and applies to all impacted pins.
So, specifically for stm32f1 series, apply remapping when required
before proceeding with pin configuration.
Additionally, because remapping is defined individually for each pin,
apply a function on pinctrl configuration to check remapping setting
coherency accorss pins.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Based on pinmux data encoded in dt bindings some stm32f1 post
processing is required to eventually fit into data structures
expected in gpio_stm32_configure function.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Provides tool set to be used by device drivers in order to be able
to configure device signals.
This does not involve the implementation of a dedicated pinctrl
driver. In this regard, this is equivalent to implementation used
for treatment of current pinmux.c files.
Since STM32F1 uses a different GPIO configuration scheme, its
support is exlcuded for now.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Update stm32_pin_configure prototype to use more appropriate
unsigned arguments
Additionally, fix documentation for z_pinmux_stm32_set function
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
Allow to reconfigure UART baudrate on ESP and on host MCU, so a
non-default baudrate can be used for communication. This option helps
for example to increase network bandwidth without touching ESP chip
firmware.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add Kconfig options to configure modem command handler buffer size and
count. This will allow to fine tune those based on UART baudrate, system
load and available memory.
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Add new Kconfig option to configure modem UART interface handler ring
buffer size. This will allow to lower ring buffer to save some resources
or increase it in case high network bandwidth is utilized (with high
UART baudrate).
Signed-off-by: Marcin Niestroj <m.niestroj@grinn-global.com>
Remove Adafruit/Seeed TFT hardcoded settings. Note that undocumented
ILI9340/1 settings have been removed (maybe Seeed is using another ILI
variant?).
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Move pixel format setting (RGB565/RGB888) to DeviceTree. Add support for
changing pixel format at runtime.
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Multiple enhancements towards better code readability and consistency:
- sorted headers
- define and reference magic constants
- adjust some names
- add U suffix to unsigned constants
- move hw reset to a function
- remove non-needed initialization code from seeed tft
Signed-off-by: Gerard Marull-Paretas <gerard@teslabs.com>
Adds imx rt support.
Allows n-number of can interfaces based on device-tree.
Adds a "common" irq name.
Added CAN bus pins and dts for 1060 and 1064 EVK.
Signed-off-by: Rick Talbott <rtalbott@fastmail.com>
This enables support for the confgure and config_get functions in
the UART API, allowing users to change baudrate, parity, stop bits,
data bits and flow control in runtime.
Signed-off-by: Jesper Derander <jesper.derander@endian.se>
Add additional pinmux definitions for I2C1 and I2C2 that are used
on the stm32f030 series SoCs. Additionally, correct the PF0 and PF1 I2C
functions, which were swapped.
Signed-off-by: Brian Kubisiak <brian@kubisiak.com>
Reset rx byte counters when hw timer/counter is disabled.
Fixes issue where disabling and re-enabling async uart rx can produce
"UART_RX_RDY" events with invalid data when power management is used.
Signed-off-by: Audun Korneliussen <audun.korneliussen@nordicsemi.no>
The condition used to detect presence of optional devicetree
properties that specify read and write opcodes was inadvertently
changed to something that will never be true. Update the check and
the property extraction to restore the original behavior.
Fixes#28635.
Signed-off-by: Stephan Walter <stephan@walter.name>
The ce0cc3a7 commit (lsm6dsl: make the driver multi-instance) changes
all bus API signature, which now requires a "const struct device *dev"
and not a "struct lsm6dsl_data *data". By mistake the shub part was
left unchanged. Fix: #28565
Signed-off-by: Armando Visconti <armando.visconti@st.com>
Algorithm for waiting for clock stabilization was failing in case when
it was waiting for clock availablity and clock was already available
before function was called. That is because nrfx_clock_is_running
was returning false because XTAL was already started but not yet
running.
Added a check for current LF source, if XTAL is picked that indicates
that RC is already running because of two stage startup procedure.
Added documentation of lfclk_spinwait with explanation of two stage
approach.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Initialize device pointer in driver's context.
It was not done quite right in commit a1708cf2f2
("drivers: ethernet: Fix device instance const qualifier loss"),
and then completely removed in commit 113d9274ea
("drivers: ethernet: remove stray expression")'
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This commit fixes the following issue:
When using slip without TAP, i.e. CONFIG_SLIP_TAP=n (default), while
another ethernet interface is enabled and sets CONFIG_NET_L2_ETHERNET=y.
This causes ethernet_init() to be wrongly called with struct dummy_api
instead of struct ethernet_api.
ethernet_init() expects struct ethernet_api (by cast), so we end up
with the get_capabilities field pointing to garbage!
Actually, as we are using the dummy api, we don't need to call
ethernet_init() at all.
Sole dependency on CONFIG_NET_L2_ETHERNET is wrong because it
can be enabled by another interface.
Signed-off-by: David Komel <a8961713@gmail.com>
Named choice is needed in order to be able to extend it
in other modules.
Closes: #28559
Signed-off-by: Ievgenii Meshcheriakov <ievgenii.meshcheriakov@nordicsemi.no>
* Add missing the PINMUX macros for UART5 pins.
* Correct a typo in STM32F1_PINMUX_FUNC_PC5_ADC12_IN15; the macro
used PC4 instead of PC5 for ADC12_IN15.
Signed-off-by: Paul Fagerburg <pfagerburg@google.com>
HAS_DTS_I2C is now selected by I2C and
always used as I2C && HAS_DTS_I2C.
It could then be purely removed.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The correct return value is -ENOBUFS if we run out of network
buffers when sending the packets.
Signed-off-by: Jukka Rissanen <jukka.rissanen@linux.intel.com>
Add BT_QUIRK_NO_AUTO_DLE quirk option for HCI rpmsg driver
when the Zephyr open source BLE controller is used.
Signed-off-by: Vinayak Kariappa Chettimada <vich@nordicsemi.no>
Fix the error recovery mechanism that makes use of a temp variable
to avoid coverity issue without breaking error recovery.
Signed-off-by: Rajavardhan Gundi <rajavardhan.gundi@intel.com>
Function spi_context_longest_current_buf() has been introduced in
commit ddef35c1da for the purpose of
getting the longest possible (potentially partial) SPI transfer
for which all currently active directions have a continuous buffer.
Such transfer can be done with taking advantage of a DMA that cannot
use scattered buffers (and this is the case for nRF SPI drivers with
which this function has been introduced).
Unfortunately, because of its inadequate name, later on this function
has been incorrectly used in other SPI drivers for getting the longer
of TX/RX buffers. And commit afc480f12b
recently "fixed" the implementation of this function, assumably to
adjust it to those incorrect uses, but this way it has also broken
the nRF SPI drivers.
Instead of restoring the original implementation of the function in
question, this commit adds a new one with functionality equivalent
to that original but with a hopefully less misleading name, and this
function is used in the nRF SPI drivers.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Isochronous transactions do not support handshake phase
so in particular the ISO endpoint cannot be STALLed.
Isochronous transactions do no support data toggle sequencing
and should only send DATA0 PID.
Taking into consideration those requirements do not try to
clear dtoggle or STALL an ISO Endpoint in nRF USBD driver.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
The pull request #26269
drivers: SPI: Adds CS flags from devicetree
missed out on the APA102 led_strip driver, most likely due to the driver
not utilising the chip select signal until #25310
drivers: led_strip: Add support for external SPI CS on APA102 LED strips
Signed-off-by: Roman Vaughan <nzsmartie@gmail.com>
Enable by default the use of RAM buffers in the spi_nrfx_spim.c
driver for copying TX data located in flash (as SPIM peripherals
cannot transfer directly form flash). Without this patch, users can
get confused, especially when SPI transaction is used by an upper
level driver which does not check all error codes.
For size of the buffer, use the value used so far in the reel_board
default configuration and in the SPI loopback test, i.e. 8 bytes.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Not possible to use device_get_binding() because we are
currently initializing DMA_1 device, so it is not ready and
device_get_binding() will fail.
Directly use string compare is more efficient.
Signed-off-by: Alexandre Bourdiol <alexandre.bourdiol@st.com>
Pins used for external LF clock source must be configured as
used by peripheral to allow using LFXO on network side.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Reimplement getaddrinfo to call SlNetUtil_getAddrInfo from the TI HAL
for a more robust implementation that supports both client and server
modes, and performs better error-checking.
Fixes#11890
Signed-off-by: Vincent Wan <vwan@ti.com>
Fixes#28275 by adding bluetooth HCI spi driver priority lower
(75 instead of 50) than SPI (70) to avoid device_get_binding
to return NULL because the device was not initialized.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Enabled going to idle when waiting for low frequency clock.
Added 2 stages of starting LF clock when XTAL is used. First
stage is starting RC and then when it is ready XTAL is started.
It is done to get event/interrupt when RC is ready which means
that LF clock is available (but not stable).
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
Added configuration for approach to starting system clock source.
There are 3 options: no wait, wait untill available, wait until
stable.
Added support for those modes in clock control driver which handles
low frequency source clock.
Signed-off-by: Krzysztof Chruscinski <krzysztof.chruscinski@nordicsemi.no>
The driver is able to write with 32-bits word alignment of size
and offset, apart form sub-word writes for which it can write
part of word to aligned offset (which is a hack).
fixes#26729
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Use setting from devicetree to drive the default setting for
CORTEX_M_SYSTICK. We update the dts files to default systick to be
enabled since the major of cortex-m platforms utilize it by default
(except on Nordic SoCs, TI CC13x2/CC26x2 and MEC1501 in which we
default to disabled).
Fixes#25299
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Rename wdog_cmsdk_apb_enable to wdog_cmsdk_apb_setup,
this API is supposed to be called during driver probe based on
CONFIG_WDOG_CMSDK_APB_START_AT_BOOT (enabled by default).
Fixes: 03c7d9bd49 ("drivers: wdog: Update CMSDK Wdog driver")
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com>
"unused value" issue reported by Coverity (CID: 214211).
This is actually a true bug as reported error is erased
and not taken into account.
Signed-off-by: Erwan Gouriou <erwan.gouriou@linaro.org>
The value from socket() was directly assigned to offload_context, which
was treated as a unsigned integer when compared. This prevented the
following if statement from catching any errors, leading to random RAM
access. This is fixed by using an intermediate with the same type as the
return value, which is then assigned to offload_context after error
checking.
Signed-off-by: Abram Early <abram.early@gmail.com>
An unnecessary expression that doesn't compile was inadvertently
introduced in the device constification PR. Remove it.
Signed-off-by: Peter Bigot <peter.bigot@nordicsemi.no>
When getting a hfxo manager for USB sybsystem incorrect symbol
was checked. This lead to always enabling HFCLK, even for nRF5340
which needs HFCLK192M.
Signed-off-by: Emil Obalski <emil.obalski@nordicsemi.no>
This code had one purpose only, feed timing information into a test and
was not used by anything else. The custom trace points unfortunatly were
not accurate and this test was delivering informatin that conflicted
with other tests we have due to placement of such trace points in the
architecture and kernel code.
For such measurements we are planning to use the tracing functionality
in a special mode that would be used for metrics without polluting the
architecture and kernel code with additional tracing and timing code.
Furthermore, much of the assembly code used had issues.
Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
MCUX EHCI USB device controller supports a specific
number of bidirectional endpoints. Bidirectional means
that an endpoint object is represented to the outside
as an OUT and an IN Eindpoint with its own buffers
and control structures.
ep_abs_idx index refers to the corresponding control
structure, for example:
EP addr | ep_idx | ep_abs_idx
-------------------------------
0x00 | 0x00 | 0x00
0x80 | 0x00 | 0x01
0x01 | 0x01 | 0x02
0x81 | 0x01 | 0x03
.... | .... | ....
The NUM_OF_EP_MAX (and number of s_ep_ctrl) should be double
of num_bidir_endpoints. There is also no need to reserve
endpoint addresses for this controller type.
Signed-off-by: Johann Fischer <j.fischer@phytec.de>
This adds supports for ISO packets so then can be transmitted and
received with userchan driver.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This adds supports for ISO packets so then can be transmitted and
received with H5 driver.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
This adds supports for ISO packets so then can be transmitted and
received with H4 driver.
Signed-off-by: Luiz Augusto von Dentz <luiz.von.dentz@intel.com>
The host command peripheral device API abstracts how an embedded
controller sends and receives data from a host on a bus. Each bus like
eSPI, SPI, or I2C would implement their own host command peripheral
device. Each hardware device would then handle the necessary hardware
access to send and receive data over that bus.
The chosen host command peripheral device will be used by the host
command handler framework to send and receive host data correctly.
Signed-off-by: Jett Rink <jettrink@google.com>
When offloading only ZSOCK_POLLIN and DNS_EAI_MEMORY are available, so
use those instead of the standard ones.
Fixes#28069.
Signed-off-by: Carles Cufi <carles.cufi@nordicsemi.no>
The dmamux requires HEAP size definition, so that k_malloc
is valid. The HEAP size config is defined in the common for
any stm32 soc instead of specific to dma Kconfig
Signed-off-by: Francois Ramu <francois.ramu@st.com>
VCO input frequency can be checked and set during compile time.
It unfortunately does not work for output frequency because macros in
HAL are defined together with uint32_t type.
This also fixes wrong check in case of HSI used as PLL source.
Signed-off-by: Jan Pohanka <xhpohanka@gmail.com>
timeslice terminology were used in connection with synchronization
using ll BLE ticker.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Rework ticker synchronization using newly introduced
radio synchronization API.
In kconfig synchronization using ll ticker become choice
option.
If CONFIG_SOC_FLASH_NRF_PARTIAL_ERASE is enabled the erase
timing is changed so intervals become similar to slots duration.
Previously interval was always ~90 ms, which looks like it was kept
so disproportional by oversight while the partial erase was
introduced.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Extract synchronization procedures using LL BLE controller
ticker to newly added synchronization API.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Introduced API which allows to decouple radio synchronization
mechanism from NVMC driver.
New API will allows to replace synchronization mechanism if required.
Signed-off-by: Andrzej Puzdrowski <andrzej.puzdrowski@nordicsemi.no>
Add console over Inter Processor Mailboxes (IPM).
This is useful for AMP processors like ADSP found on up_squared board.
Signed-off-by: Andrei Emeltchenko <andrei.emeltchenko@intel.com>
The SX126x supports using DIO2 to control an TX switch, but only if
the switch can be operated using a single control signal. Add support
for RF switches that are wired to a GPIO instead of the radio chip
itself. This makes it possible to use RF switches that require two
control signals (one for the RX port and one for the TX port) by
wiring them to two GPIOs on the MCU.
Signed-off-by: Andreas Sandberg <andreas@sandberg.pp.se>
The stm32_dma_disable_stream first checked if the stream was
disabled and if so returned OK. If it wasn't disabled it
tried to disable it and returned -EAGAIN.
The function is used in loops that try to disable the stream
by calling this function and if it fails wait for 1ms and
retry.
Becuase this function the first time (if the stream wasn't
disabled already) fails there is always a 1 ms delay. For
the SPI driver, that has a RX and TX stream, this means
a 2ms delay between the last data and CS going high.
By first trying to disable the stream and than checking
if it succeded most of the time the first call disables
the stream and the 1ms delay isn't needed.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
- Fix GPIO CS timing when using DMA. When using GPIO CS the
CS select was enabled after the DMA started the transfer,
resulting in the first few bits being transfered while
CS was still disabled.
- Fix TX or RX only DMA transfers. When only a RX or only
a TX transfer was requested the DMA never finished.
For the RX only cause the size on the transfer was
calculated by taking the TX buffer length (0), this
caused problems.
For the TX only transfer the RX buffer was set to NULL,
this caused the DMA to acctually writing data to the
adress 0x00000000. By using the dummy destination buffer
it now only writes to valid memory.
- Add semaphore to signal that DMA is ready, instead of
just busy waiting.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Replace hardcoded sector size value in sample with sector-size
property added in dts binding file
Signed-off-by: Marin Jurjevic <marin.jurjevic@hotmail.com>
When building flash shell sample we get:
flash_stm32wbx.c:23:10: fatal error: shci.h: No such file or directory
23 | #include "shci.h"
Fix this by adding ifdef protection around inclusion of shci.h.
Fixes#28036
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
Schedule read work every 100ms for better latency.
Reschedule read work directly in case of a packet is received
(fast dequeue).
Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
Fix compile errors of the form:
video_mcux_csi.c: In function 'video_mcux_csi_init_0':
video_mcux_csi.c:422:40: error: 'const struct device' has no member
named 'driver_data'
422 | struct video_mcux_csi_data *data = dev->driver_data;
| ^~
Signed-off-by: Kumar Gala <kumar.gala@linaro.org>
In the I2S CAVS driver, the DMA user data simply points to
the device struct. However, after the change to const-ify device
struct, this causes warnings from compiler because the user_data
assignment would discard the const qualifier. The user_data is
being used to point back to the device struct, and the DMA
callbacks are already casting the user data argument into
a const device struct. So it's a simple fix by casting
the device pointer to void pointer at device creation.
Fixes#28016
Signed-off-by: Daniel Leung <daniel.leung@intel.com>
Fixed 'line length exceeds 80 columns' warning by shortening the clock
controller device name from NPCX_CLOCK_CONTROL_NAME to
NPCX_CLK_CTRL_NAME.
Signed-off-by: Mulin Chao <MLChao@nuvoton.com>
This is a follow-up to commit 701e9befe4.
The NRFX_POWER Kconfig option should be enabled together with USB_NRFX,
not with CLOCK_CONTROL_NRF, as the USB driver is the actual user of
the nrfx POWER driver.
This patch adds also missing initialization of the nrfx POWER driver
and refactors a bit the usb_init() function introduced in the commit
mentioned above, so that it does not redefine the DT_DRV_COMPAT macro
and uses for conditional compilation the same Kconfig option that is
the dependency of NRFX_USBREG.
Signed-off-by: Andrzej Głąbek <andrzej.glabek@nordicsemi.no>
Add support for `CONFIG_UART_ASYNC_API` to the uart_rtt driver.
As RTT provides no mechanism for knowing when new data has arrived,
the reception commands all return errors.
This fixes hard faults when asynchronous calls are made on the uart_rtt
driver, in addition to providing a small level of functionality.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
Instantiate RTT UART instances from devicetree nodes instead of from
Kconfig symbols. While RTT is implemented using software, not hardware,
it is emulating a hardware device, and thus should be configured through
devicetree. This allows the simulated UART device to be selected via
devicetree aliases and chosen nodes.
The following devicetree snippet will instantiate RTT channels 0 and 2
as UART devices.
```
/ {
rtt0: rtt_terminal {
compatible = "segger,rtt-uart";
label = "rtt_terminal";
status = "okay";
};
rtt2: rtt_secondary {
compatible = "segger,rtt-uart";
label = "rtt_app_specific";
status = "okay";
};
};
```
Fixes the RTT portion of #10621.
Signed-off-by: Jordan Yates <jordan.yates@data61.csiro.au>
The general DMA driver doesn't use kmalloc anymore so it doesn't
need a memory pool. The DMAMUX_SMT32 driver still uses kmalloc,
so move the HEAP_MEM_POOL_SIZE config under DMAMUX_STM32.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use dma_stm32_disable_stream instead of stm32_dma_disable_stream
to check if the disabling of the stream really worked and if
not return an error.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Convert global conversion tables for id-to-stream and slot-to-channel
to functions that use local const static conversion tables.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
- Remove the need for kmalloc
- On hardware that supports it use 1 IRQ handler per stream to
determine the stream ID, so the ISR does not have to loop
over all ID's to see which one is active. On hardware (like
STM32L0 and STM32F0) where up to 7 streams share 3 IRQ's use
the loop to check which stream is active.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Use volatile for flag shared between normal code and ISR to
prevent the compiler from possibly optimizing it away.
Signed-off-by: Erwin Rol <erwin@erwinrol.com>
Reduced the size of tx_buffer_def array to 1 to save
on function stack memory. Here only 1 buffer is
enough to call the transmit function.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
Modify the ethernet driver to use TX complete interrupts.
Adds HAL ethernet TX complete callback and locking semaphore.
Due to changing behavior/content of the TX DMA descriptors
on STM32H7 series, based on the state of the IP,
it is more reliable to wait for the TX complete interrupt to check
for DMA end of transmission event. This avoids polling the
DMA_DESC_OWN bit in the descriptors.
Improves reliability and performance of the ethernet peripheral.
Tested on CoapServer sample, Dumb HTTP server, telnet sample.
Signed-off-by: Jeremy LOCHE <lochejeremy@gmail.com>
